Adapt p9_sbe_check_master_stop15 for bad path on non-SBE platforms for fleetwood

1. On PENDING/INVALID_STATE RCs, need some FFDC and service actions on FSP
   using regular FAPI mechanisms like FAPI_ASSERT and register ffdc colletion

2. SBE still uses existing mechanism and restrictions - optimized for space
 a. no fapi error xml based callbacks
 b. no fapi error xml based register ffdc collection
 c. max local ffdc members < 20
 d. depends on p9_collect_deadman_ffdc for FFDC with RC TIMEOUT

3. Compile out extra code on SBE builds

Change-Id: Id35f9a7dbfc7e423bd7cf0846f493a8270a48cd6
CQ: SW430391
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60320
Reviewed-by: RANGANATHPRASAD BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60391
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>

3 files changed, 107 insertions, 29 deletions

diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.C
index 22780175..e81232e6 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER sbe Project                                                  */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2016,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2016,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -74,6 +74,12 @@ fapi2::ReturnCode p9_sbe_check_master_stop15(
     uint32_t l_stop_requested_level = 0; // Running Level
     uint32_t l_stop_actual_level = 0;    // Running Level
 
+#ifndef __PPE__
+    auto l_chip = i_target.getParent<fapi2::TARGET_TYPE_PROC_CHIP>();
+    auto l_ex = i_target.getParent<fapi2::TARGET_TYPE_EX>();
+    auto l_eq = i_target.getParent<fapi2::TARGET_TYPE_EQ>();
+#endif
+
     // Read the "Other" STOP History Register
     FAPI_TRY(fapi2::getScom(i_target, C_PPM_SSHOTR, l_data64));
 
@@ -111,12 +117,23 @@ fapi2::ReturnCode p9_sbe_check_master_stop15(
         (l_stop_gated ==  p9ssh::SSH_GATED &&
          l_stop_transition != p9ssh::SSH_COMPLETE))
     {
+#ifndef __PPE__
+        /* On non-SBE platforms, the RC is handled via regular FAPI_ASSERT */
+        FAPI_ASSERT(false,
+                    fapi2::CHECK_MASTER_STOP15_PENDING ()
+                    .set_PU(l_chip)
+                    .set_EQ(l_eq)
+                    .set_EX(l_ex)
+                    .set_EC(i_target),
+                    "Core still transitioning to STOP 15 ..");
+#else
         /*
          * Don't use FAPI_ASSERT() here as this is a "try again" return code
          * used inside a polling loop. We don't want to spam logs with something
          * that's not an error really.
          */
         return fapi2::RC_CHECK_MASTER_STOP15_PENDING;
+#endif
     }
 
     if (l_stop_gated == p9ssh::SSH_GATED &&
@@ -127,32 +144,25 @@ fapi2::ReturnCode p9_sbe_check_master_stop15(
     }
     else
     {
+#ifndef __PPE__
+        /* On non-SBE platforms, the RC is handled via regular FAPI_ASSERT */
+        FAPI_ASSERT(false,
+                    fapi2::CHECK_MASTER_STOP15_INVALID_STATE ()
+                    .set_PU(l_chip)
+                    .set_EQ(l_eq)
+                    .set_EX(l_ex)
+                    .set_EC(i_target),
+                    "Core Failed entering STOP 15!");
+#else
         /*
          * This is a fail code,however, FFDC should be collected via a separate
          * call to p9_collect_deadman_ffdc. Avoiding FAPI_ASSERT() as an
          * optimization
          */
         return fapi2::RC_CHECK_MASTER_STOP15_INVALID_STATE;
+#endif
     }
 
-// @todo RTC 162331 These should work but don't..... follow-up later
-//     // Check for valid pending condition (which includes running)
-//     FAPI_ASSERT((l_stop_gated == p9ssh::SSH_RUNNING ||
-//                   (l_stop_gated ==  p9ssh::SSH_GATED &&
-//                    l_stop_transition != p9ssh::SSH_COMPLETE)),
-//                 fapi2::CHECK_MASTER_STOP15_PENDING(),
-//                 "STOP 15 is still pending");
-
-//     // Assert gated, completion and the proper STOP actual level.  If not, something is off.
-//     FAPI_ASSERT((l_stop_gated == p9ssh::SSH_GATED &&
-//                  l_stop_transition == p9ssh::SSH_COMPLETE &&
-//                  (l_stop_actual_level == 11 || l_stop_actual_level == 15)),
-//                 fapi2::CHECK_MASTER_STOP15_INVALID_STATE()
-//                 .set_STOP_HISTORY(l_data64),
-//     }            "STOP 15 error");
-
-
-
 fapi_try_exit:
     FAPI_INF("< p9_sbe_check_master_stop15");
 
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.H
index 8efd9abf..dc8db806 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_check_master_stop15.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER sbe Project                                                  */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2016,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2016,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -30,7 +30,7 @@
 // *HWP FW Owner    : Prem S Jha <premjha2@in.ibm.com>
 // *HWP Team        : PM
 // *HWP Level       : 3
-// *HWP Consumed by : SBE
+// *HWP Consumed by : SBE, FSP
 //------------------------------------------------------------------------------
 
 
@@ -51,9 +51,11 @@ typedef fapi2::ReturnCode (*p9_sbe_check_master_stop15_FP_t)(const
 /// @return     STOP15_PENDING  STOP 15 not reached, but no error
 ///             HW state (still in progress)
 /// @return     Others indicate hardware failure
-/// @note       On timeout or other FW controlled errors, related to but
-///             outside scope of this HWP, please use p9_collect_deadman_ffdc
-///             to generate the appropriate RC with FFDC
+/// @note       On non-SBE platforms, regular FAPI_ASSERT based error handling
+///             and related FFDC and callouts
+///             On SBE, for code space optimization, FAPI_ASSERT is not used.
+///             Please use p9_collect_deadman_ffdc to generate appropriate RC
+///             and FFDC
 ///
 extern "C"
 {
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_check_master_stop15_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_check_master_stop15_errors.xml
index 54043657..15b26599 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_check_master_stop15_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_check_master_stop15_errors.xml
@@ -5,7 +5,7 @@
 <!--                                                                        -->
 <!-- OpenPOWER sbe Project                                                  -->
 <!--                                                                        -->
-<!-- Contributors Listed Below - COPYRIGHT 2016,2017                        -->
+<!-- Contributors Listed Below - COPYRIGHT 2016,2018                        -->
 <!-- [+] International Business Machines Corp.                              -->
 <!--                                                                        -->
 <!--                                                                        -->
@@ -30,11 +30,43 @@
       Procedure: p9_sbe_check_master_stop15
       Indicates the targeted core is either running (hasn't started to enter
       a STOP state) or is in transition. This return code would be used by the
-      caller (SBE control loop) to determine whether to continue polling for a
-      completed transition.
-
-      Note: STOP 11 and STOP 15 are equivalent for POWER9.
+      caller (FSP/SBE control loop) to determine whether to continue polling
+      for a completed transition.
     </description>
+
+    <collectFfdc>p9_eq_clear_atomic_lock,EQ</collectFfdc>
+
+    <collectRegisterFfdc>
+        <id>CHECK_MASTER_STOP15_FFDC_REGS_PU</id>
+        <target>PU</target>
+        <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    </collectRegisterFfdc>
+    <collectRegisterFfdc>
+        <id>CHECK_MASTER_STOP15_FFDC_REGS_EQ</id>
+        <target>EQ</target>
+        <targetType>TARGET_TYPE_EQ</targetType>
+    </collectRegisterFfdc>
+    <collectRegisterFfdc>
+        <id>CHECK_MASTER_STOP15_FFDC_REGS_EX</id>
+        <target>EX</target>
+        <targetType>TARGET_TYPE_EX</targetType>
+    </collectRegisterFfdc>
+    <collectRegisterFfdc>
+        <id>CHECK_MASTER_STOP15_FFDC_REGS_EC</id>
+        <target>EC</target>
+        <targetType>TARGET_TYPE_CORE</targetType>
+    </collectRegisterFfdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
+    <callout>
+      <procedure>LVL_SUPPORT</procedure>
+      <priority>LOW</priority>
+    </callout>
+    <deconfigure>
+      <target>EC</target>
+    </deconfigure>
   </hwpError>
   <!-- ******************************************************************** -->
   <hwpError>
@@ -44,6 +76,40 @@
       Indicates the targeted core is no longer pending entering a STOP state
       but the achieved level is not appropriate.
     </description>
+
+    <collectFfdc>p9_eq_clear_atomic_lock,EQ</collectFfdc>
+
+    <collectRegisterFfdc>
+        <id>CHECK_MASTER_STOP15_FFDC_REGS_PU</id>
+        <target>PU</target>
+        <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    </collectRegisterFfdc>
+    <collectRegisterFfdc>
+        <id>CHECK_MASTER_STOP15_FFDC_REGS_EQ</id>
+        <target>EQ</target>
+        <targetType>TARGET_TYPE_EQ</targetType>
+    </collectRegisterFfdc>
+    <collectRegisterFfdc>
+        <id>CHECK_MASTER_STOP15_FFDC_REGS_EX</id>
+        <target>EX</target>
+        <targetType>TARGET_TYPE_EX</targetType>
+    </collectRegisterFfdc>
+    <collectRegisterFfdc>
+        <id>CHECK_MASTER_STOP15_FFDC_REGS_EC</id>
+        <target>EC</target>
+        <targetType>TARGET_TYPE_CORE</targetType>
+    </collectRegisterFfdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
+    <callout>
+      <procedure>LVL_SUPPORT</procedure>
+      <priority>LOW</priority>
+    </callout>
+    <deconfigure>
+      <target>EC</target>
+    </deconfigure>
   </hwpError>
   <!-- ******************************************************************** -->
   <hwpError>