SBE tracearray chip-op

Change-Id: Ic01d96424c2459c56d4cb7578cf87f592b748466
RTC:128332
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32359
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: RAJA DAS <rajadas2@in.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>

3 files changed, 91 insertions, 0 deletions

diff --git a/src/test/testcases/test.xml b/src/test/testcases/test.xml
index c3f09f32..4bc43092 100755
--- a/src/test/testcases/test.xml
+++ b/src/test/testcases/test.xml
@@ -42,6 +42,7 @@
           <include>../simics/targets/p9_nimbus/sbeTest/testStopClocks.xml</include>
           <include>../simics/targets/p9_nimbus/sbeTest/testExecutorPutRing.xml</include>
           <include>../simics/targets/p9_nimbus/sbeTest/testSystemFabricMap.xml</include>
+          <include>../simics/targets/p9_nimbus/sbeTest/testArrayAccess.xml</include>
           <include>../simics/targets/p9_nimbus/sbeTest/testGetRing.xml</include>
           <include>../simics/targets/p9_nimbus/sbeTest/testQuiesce.xml</include>
           <testcase>
diff --git a/src/test/testcases/testArrayAccess.xml b/src/test/testcases/testArrayAccess.xml
new file mode 100644
index 00000000..4c2bb321
--- /dev/null
+++ b/src/test/testcases/testArrayAccess.xml
@@ -0,0 +1,30 @@
+<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
+<!-- This is an automatically generated prolog.                             -->
+<!--                                                                        -->
+<!-- $Source: src/test/testcases/testArrayAccess.xml $                      -->
+<!--                                                                        -->
+<!-- OpenPOWER sbe Project                                                  -->
+<!--                                                                        -->
+<!-- Contributors Listed Below - COPYRIGHT 2016                             -->
+<!--                                                                        -->
+<!--                                                                        -->
+<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
+<!-- you may not use this file except in compliance with the License.       -->
+<!-- You may obtain a copy of the License at                                -->
+<!--                                                                        -->
+<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
+<!--                                                                        -->
+<!-- Unless required by applicable law or agreed to in writing, software    -->
+<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
+<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
+<!-- implied. See the License for the specific language governing           -->
+<!-- permissions and limitations under the License.                         -->
+<!--                                                                        -->
+<!-- IBM_PROLOG_END_TAG                                                     -->
+<?xml version="1.0" encoding="UTF-8"?>
+
+      <!-- Control Trace Array Test case -->
+      <testcase>
+          <simcmd>run-python-file targets/p9_nimbus/sbeTest/testTraceArray.py</simcmd>
+          <exitonerror>yes</exitonerror>
+      </testcase>
diff --git a/src/test/testcases/testTraceArray.py b/src/test/testcases/testTraceArray.py
new file mode 100644
index 00000000..02c8a9ce
--- /dev/null
+++ b/src/test/testcases/testTraceArray.py
@@ -0,0 +1,60 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: src/test/testcases/testTraceArray.py $
+#
+# OpenPOWER sbe Project
+#
+# Contributors Listed Below - COPYRIGHT 2016
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
+import sys
+sys.path.append("targets/p9_nimbus/sbeTest" )
+import testUtil
+err = False
+
+CONTROL_TRACE_ARRAY_TESTDATA = [0, 0, 0, 0x04,
+                                0, 0, 0xA6, 0x02,
+                                0, 0, 0x04, 0x20, #Core chiplet
+                                0, 0x01, 0, 0x1D] #reset|collect|stop|ingore mux
+
+CONTROL_TRACE_ARRAY_VALID = [0, 0, 0, 0, #Number of Words
+                             0xC0, 0xDE, 0xA6, 0x02,
+                             0, 0, 0, 0,
+                             0, 0, 0, 0x03]
+
+# MAIN Test Run Starts Here...
+#-------------------------------------------------
+def main( ):
+    testUtil.runCycles( 10000000 )
+    print ("\nStarting control tracearray test")
+    testUtil.writeUsFifo( CONTROL_TRACE_ARRAY_TESTDATA)
+    testUtil.writeEot( )
+    testUtil.readDsFifo( CONTROL_TRACE_ARRAY_VALID)
+    testUtil.readEot( )
+
+#-------------------------------------------------
+# Calling all test code
+#-------------------------------------------------
+main()
+
+if err:
+    print ("\nTest Suite completed with error(s)")
+    #sys.exit(1)
+else:
+    print ("\nTest Suite completed with no errors")
+    #sys.exit(0);