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| author | Sunil Kumar <skumar8j@in.ibm.com> | 2018-11-15 00:20:34 -0600 |
|---|---|---|
| committer | RAJA DAS <rajadas2@in.ibm.com> | 2019-05-30 05:41:21 -0500 |
| commit | 01030a212c0793d0f8c84c8ff187fe7db0e07df7 (patch) | |
| tree | 5a639dc63b6c7cd5a372b0856e8be02724bdc221 /src/test/testcases/testUtil.py | |
| parent | 28c54880dd080a0baa1540246effd7c49a499c82 (diff) | |
| download | talos-sbe-01030a212c0793d0f8c84c8ff187fe7db0e07df7.tar.gz talos-sbe-01030a212c0793d0f8c84c8ff187fe7db0e07df7.zip | |
AXONE Bringup CI
Change-Id: I611879498fe0b728547209716cecf6d940a9a820
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72837
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: RAJA DAS <rajadas2@in.ibm.com>
Diffstat (limited to 'src/test/testcases/testUtil.py')
| -rw-r--r-- | src/test/testcases/testUtil.py | 23 |
1 files changed, 21 insertions, 2 deletions
diff --git a/src/test/testcases/testUtil.py b/src/test/testcases/testUtil.py index 35c20720..95626fa1 100644 --- a/src/test/testcases/testUtil.py +++ b/src/test/testcases/testUtil.py @@ -5,7 +5,7 @@ # # OpenPOWER sbe Project # -# Contributors Listed Below - COPYRIGHT 2015,2018 +# Contributors Listed Below - COPYRIGHT 2015,2019 # [+] International Business Machines Corp. # # @@ -32,7 +32,10 @@ cyclesPerIter = 20000; def getLbus( node, isfleetwood ): #This is non-fleetwood system, where node is 0 by default if (isfleetwood == 0): - lbus=conf.p9Proc0.proc_lbus_map + if getMachineName() == "axone": + lbus=conf.backplane0.proc0.cfam_cmp.lbus_map + else: + lbus=conf.p9Proc0.proc_lbus_map else: # This is fleetwood system if(node == 0): @@ -259,3 +262,19 @@ def checkEqual( data, expdata ): print "Expected Data", expdata raise Exception('data mistmach'); +def getMachineName(): + try: + sbeScriptsPath = simenv.sbe_scripts_path + machineType = "axone" + except: + machineType = "nimbus" + finally: + return machineType + +def collectFFDC(): + simics.SIM_run_command('sbe-trace 0') + simics.SIM_run_command('sbe-stack 0') + simics.SIM_run_command('sbe-regffdc 0') + simics.SIM_run_command('backplane0.proc0.pib_cmp.sbe_ppe->ppe_state') + simics.SIM_run_command('backplane0.proc0.cfam_cmp.sbe_fifo->upstream_hw_fifo') + simics.SIM_run_command('backplane0.proc0.cfam_cmp.sbe_fifo->downstream_hw_fifo')
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