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authorspashabk-in <shakeebbk@in.ibm.com>2018-03-23 06:09:42 -0500
committerSachin Gupta <sgupta2m@in.ibm.com>2018-04-16 12:39:23 -0400
commitbe846edf5a2fae95ffdb81b626410d35d435fcd7 (patch)
tree47b81cdb995faa747e9a9c080ad4aa0d1f8e2986 /src/sbefw
parentaa83a786a35d5fc48f90c1a5de13d6e818a77404 (diff)
downloadtalos-sbe-be846edf5a2fae95ffdb81b626410d35d435fcd7.tar.gz
talos-sbe-be846edf5a2fae95ffdb81b626410d35d435fcd7.zip
Consume PROC_MEM_TO_USE for alt memory config
Change-Id: Ideb3c3d2bbdbce8b773d51b86d9f97f2e654ca56 RTC:189091 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56197 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56203
Diffstat (limited to 'src/sbefw')
-rw-r--r--src/sbefw/app/power/ipl_table.C55
1 files changed, 26 insertions, 29 deletions
diff --git a/src/sbefw/app/power/ipl_table.C b/src/sbefw/app/power/ipl_table.C
index 6cdda196..da1d3cb2 100644
--- a/src/sbefw/app/power/ipl_table.C
+++ b/src/sbefw/app/power/ipl_table.C
@@ -603,7 +603,7 @@ ReturnCode istepLoadBootLoader( voidfuncptr_t i_hwp)
l_hostboot_hrmor_offset);
rc = p9_fbc_utils_get_chip_base_address_no_aliases(
proc,
- ABS_FBC_GRP_ID_ONLY,
+ HB_GRP_CHIP_IDS,
drawer_base_address_nm0,
drawer_base_address_nm1,
drawer_base_address_m,
@@ -807,24 +807,23 @@ ReturnCode istepWithExL2Flush( voidfuncptr_t i_hwp)
break;
}
// check the position of EX i.e. Ex0 or Ex1
- if(!(l2IsScomable[((exTgt.getChipletNumber()) % 2)]))
+ if(l2IsScomable[((exTgt.getChipletNumber()) % 2)])
{
- SBE_INFO(SBE_FUNC "Ex chipletId [%d] not l2 scomable, so no purge",
- exTgt.getChipletNumber());
- // TODO via RTC 191254
- // Enable this code back once stop states are enabled
- // This is temporary hack to debug SW422447
- // continue;
+ p9core::purgeData_t l_purgeData;
+ SBE_EXEC_HWP(rc,
+ reinterpret_cast<sbeIstepHwpExL2Flush_t>(i_hwp),
+ exTgt,
+ l_purgeData)
+ if(rc != FAPI2_RC_SUCCESS)
+ {
+ SBE_ERROR(SBE_FUNC " p9_l2_flush failed, RC=[0x%08X]", rc);
+ break;
+ }
}
- p9core::purgeData_t l_purgeData;
- SBE_EXEC_HWP(rc,
- reinterpret_cast<sbeIstepHwpExL2Flush_t>(i_hwp),
- exTgt,
- l_purgeData)
- if(rc != FAPI2_RC_SUCCESS)
+ else
{
- SBE_ERROR(SBE_FUNC " p9_l2_flush failed, RC=[0x%08X]", rc);
- break;
+ SBE_INFO(SBE_FUNC "Ex chipletId [%d] not l2 scomable, so no purge",
+ exTgt.getChipletNumber());
}
}
SBE_EXIT(SBE_FUNC);
@@ -864,22 +863,20 @@ ReturnCode istepWithExL3Flush( voidfuncptr_t i_hwp)
}
// check the position of EX i.e. Ex0 or Ex1
- if(!(l3IsScomable[((exTgt.getChipletNumber()) % 2)]))
+ if(l3IsScomable[((exTgt.getChipletNumber()) % 2)])
{
- SBE_INFO(SBE_FUNC "Ex chipletId [%d] not l3 scomable, so no purge",
- exTgt.getChipletNumber());
- // TODO via RTC 191254
- // Enable this code back once stop states are enabled
- // This is temporary hack to debug SW422447
- // continue;
+ SBE_EXEC_HWP(rc, reinterpret_cast<sbeIstepHwpExL3Flush_t>(i_hwp),
+ exTgt, L3_FULL_PURGE, 0x0)
+ if(rc != FAPI2_RC_SUCCESS)
+ {
+ SBE_ERROR(SBE_FUNC " p9_l3_flush failed, RC=[0x%08X]", rc);
+ break;
+ }
}
-
- SBE_EXEC_HWP(rc, reinterpret_cast<sbeIstepHwpExL3Flush_t>(i_hwp),
- exTgt, L3_FULL_PURGE, 0x0)
- if(rc != FAPI2_RC_SUCCESS)
+ else
{
- SBE_ERROR(SBE_FUNC " p9_l3_flush failed, RC=[0x%08X]", rc);
- break;
+ SBE_INFO(SBE_FUNC "Ex chipletId [%d] not l2 scomable, so no purge",
+ exTgt.getChipletNumber());
}
}
SBE_EXIT(SBE_FUNC);
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