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author | Raja Das <rajadas2@in.ibm.com> | 2016-09-07 01:00:13 -0500 |
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committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2016-10-06 07:47:18 -0400 |
commit | edec9bde06d4a3e1c06fc15c9312318b9324d94c (patch) | |
tree | 963a635bd1e3e456bd25a28e1d8ff86744ac043a /src/sbefw/sbe_sp_intf.H | |
parent | 6be042c2d9e9f64b3151fc95dbd98dd2723474c5 (diff) | |
download | talos-sbe-edec9bde06d4a3e1c06fc15c9312318b9324d94c.tar.gz talos-sbe-edec9bde06d4a3e1c06fc15c9312318b9324d94c.zip |
Stop Clocks for MPIPL (Core & Cache(EQ))
RTC: 156382
Change-Id: Ib3e8c29467aa7d3b6b85286e6f5ce154f0f28ad6
RTC: 156382
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29555
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Shakeeb A. Pasha B K <shakeebbk@in.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src/sbefw/sbe_sp_intf.H')
-rw-r--r-- | src/sbefw/sbe_sp_intf.H | 24 |
1 files changed, 22 insertions, 2 deletions
diff --git a/src/sbefw/sbe_sp_intf.H b/src/sbefw/sbe_sp_intf.H index e58cb7bf..6c6bb8b5 100644 --- a/src/sbefw/sbe_sp_intf.H +++ b/src/sbefw/sbe_sp_intf.H @@ -166,6 +166,7 @@ enum sbeMpIplCommands { SBE_CMD_MPIPL_ENTER = 0x01, /* Enter MPIPL */ SBE_CMD_MPIPL_CONTINUE = 0x02, /* Continue MPIPL */ + SBE_CMD_MPIPL_STOPCLOCKS = 0x03, /* Stop Clocks */ }; /** @@ -274,6 +275,7 @@ enum GET_SBE_FREQUENCIES_SUPPPORTED = 0xA8000004, GET_SBE_STATE_SUPPPORTED = 0xA8000008, SBE_QUIESCE = 0xA8000010, + STOP_CLOCKS_MPIPL_SUPPORTED = 0xA9000004, }; /** @@ -361,8 +363,14 @@ enum sbeRegAccesRegType SBE_REG_ACCESS_FPR = 0x02, }; + +// Base Target Type offset maintined by SBE to be used across different chip-ops +// Need to avoid any duplicate target type since it is used to convert into FAPI +// target via file sbefapiutil.C + /* - * @brief enums for target types used in ring access chip op + * @brief enums for target types used in ring access chip op and + * in stop clocks chip ops */ typedef enum { @@ -370,7 +378,19 @@ typedef enum TARGET_EX = 0x0001, TARGET_PERV = 0x0002, TARGET_MCS = 0x0003, -} sbeRingTargetTypes_t; + TARGET_EQ = 0x0004, + TARGET_CORE = 0x0005, +} sbeTargetTypes_t; + +/** + * @brief Cache Chiplet Id Enum + */ +enum sbeCacheChipletId +{ + EQ_ID_0 = 0x10, + EQ_ID_MAX = 0x06, + EQ_ALL_CHIPLETS = 0xFF, +}; /* * @brief enums for access modes used in ring access chip op |