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author | Joachim Fenkes <fenkes@de.ibm.com> | 2017-11-14 17:58:25 +0100 |
---|---|---|
committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-12-11 22:54:06 -0500 |
commit | fdcf15d4d7b70b610b1a8f41b8046500f41bf9c7 (patch) | |
tree | 59913536249cf3c00d35ee67a7277cdceaaacb76 /src/import | |
parent | be19efc55754acc7acb3203dd70e55a2cc2a2aee (diff) | |
download | talos-sbe-fdcf15d4d7b70b610b1a8f41b8046500f41bf9c7.tar.gz talos-sbe-fdcf15d4d7b70b610b1a8f41b8046500f41bf9c7.zip |
p9_sbe_npll_setup: Enable Spread Spectrum right after SS PLL lock
As it is no longer a requirement that Spread Spectrum is enabled on all
SS PLLs in a system in unison, we're better off turning on spreading
as early as possible, so any link training runs off of a spread clock.
The only way to enable Spread Spectrum in P9 is via the TOD Timer, so
we have to set up a timer compare value of 1 and force the TOD value to
1 so that the timer is hit and the TOD's spread enable output turns on.
Change-Id: I0bcd33f17ef06beafb44ba6777d32b98d0680deb
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49662
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Dev-Ready: Joachim Fenkes <fenkes@de.ibm.com>
Reviewed-by: Abhishek Agarwal <abagarw8@in.ibm.com>
Reviewed-by: SRINIVAS V. POLISETTY <srinivan@in.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49667
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C | 65 | ||||
-rw-r--r-- | src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_setup_errors.xml | 33 |
2 files changed, 95 insertions, 3 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C index 5a6b52bd..736381c2 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C @@ -54,6 +54,9 @@ enum P9_SBE_NPLL_SETUP_Private_Constants static fapi2::ReturnCode p9_sbe_npll_setup_sectorbuffer_pulsemode_settings( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip); +static fapi2::ReturnCode enable_spread_spectrum_via_tod( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip); + fapi2::ReturnCode p9_sbe_npll_setup(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip) { @@ -112,8 +115,24 @@ fapi2::ReturnCode p9_sbe_npll_setup(const FAPI_ASSERT(l_read_reg.getBit<0>(), fapi2::SS_PLL_LOCK_ERR() .set_MASTER_CHIP(i_target_chip) - .set_SS_PLL_READ(l_read_reg), - "ERROR:SS PLL LOCK NOT SET"); + .set_SS_PLL_READ(l_read_reg) + .set_AFTER_SPREAD_ENABLE(false), + "ERROR:SS PLL LOCK NOT SET BEFORE ENABLING SPREAD SPECTRUM"); + + FAPI_TRY(enable_spread_spectrum_via_tod(i_target_chip)); + fapi2::delay(NS_DELAY, SIM_CYCLE_DELAY); + + FAPI_DBG("check SS PLL lock again after enabling spread spectrum"); + //Getting PLL_LOCK_REG register value + FAPI_TRY(fapi2::getScom(i_target_chip, PERV_TP_PLL_LOCK_REG, + l_read_reg)); //l_read_reg = PERV.PLL_LOCK_REG + + FAPI_ASSERT(l_read_reg.getBit<0>(), + fapi2::SS_PLL_LOCK_ERR() + .set_MASTER_CHIP(i_target_chip) + .set_SS_PLL_READ(l_read_reg) + .set_AFTER_SPREAD_ENABLE(true), + "ERROR:SS PLL LOCK NOT SET AFTER ENABLING SPREAD SPECTRUM"); FAPI_DBG("Release SS PLL Bypass"); //Setting ROOT_CTRL8 register value @@ -327,3 +346,45 @@ static fapi2::ReturnCode p9_sbe_npll_setup_sectorbuffer_pulsemode_settings( fapi_try_exit: return fapi2::current_err; } + +/// @brief Enable the TOD's spread spectrum enable output +/// +/// Set the TOD timer to a nonzero value to arm it and briefly start the +/// TOD so that is passes the set timer value. The TOD will stop in ERROR +/// state due to missing SYNC pulses but we don't care about that and +/// clear out the error afterwards. The spread spectrum enable will stay set. +/// +/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target +/// @return FAPI2_RC_SUCCESS if success, else error code. +static fapi2::ReturnCode enable_spread_spectrum_via_tod( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip) +{ + fapi2::buffer<uint64_t> l_data; + + FAPI_DBG("Enable Spread Spectrum via TOD"); + + // Set up the TOD timer unit to trigger on a TOD value of one + l_data.flush<0>().insertFromRight<PERV_TOD_TIMER_REG_VALUE, PERV_TOD_TIMER_REG_VALUE_LEN>(1ULL); + FAPI_TRY(fapi2::putScom(i_target_chip, PERV_TOD_TIMER_REG, l_data)); + + // Reset the TOD and set it to a value of one to trigger the timer + l_data.flush<0>().setBit<PERV_TOD_LOAD_TOD_MOD_REG_FSM_TRIGGER>(); + FAPI_TRY(fapi2::putScom(i_target_chip, PERV_TOD_LOAD_TOD_MOD_REG, l_data)); + l_data.flush<0>() + .insertFromRight<PERV_TOD_LOAD_TOD_REG_VALUE, PERV_TOD_LOAD_TOD_REG_VALUE_LEN>(1ULL) + .setBit<63>(); + FAPI_TRY(fapi2::putScom(i_target_chip, PERV_TOD_LOAD_TOD_REG, l_data)); + + // Check that the TOD timer turned its SSCGEN output on + FAPI_TRY(fapi2::getScom(i_target_chip, PERV_TOD_TIMER_REG, l_data)); + + // If the Assertion fails, don't exit; we can keep trucking without Spread Spectrum + FAPI_ASSERT_NOEXIT(l_data.getBit<PERV_TOD_TIMER_REG_STATUS>(), + fapi2::SPREAD_SPECTRUM_ENABLE_ERR() + .set_MASTER_CHIP(i_target_chip) + .set_TOD_TIMER_REG(l_data), + "Spread Spectrum enable signal not set"); + +fapi_try_exit: + return fapi2::current_err; +} diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_setup_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_setup_errors.xml index bb135458..1178317c 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_setup_errors.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_setup_errors.xml @@ -32,7 +32,7 @@ <hwpError> <sbeError/> <rc>RC_SS_PLL_LOCK_ERR</rc> - <description>Spectrum pll not locked</description> + <description>Spread Spectrum pll not locked</description> <collectRegisterFfdc> <id>ROOT_CTRL_REGISTERS</id> <target>MASTER_CHIP</target> @@ -44,6 +44,7 @@ <targetType>TARGET_TYPE_PROC_CHIP</targetType> </collectRegisterFfdc> <ffdc>SS_PLL_READ</ffdc> + <ffdc>AFTER_SPREAD_ENABLE</ffdc> <callout> <target>MASTER_CHIP</target> <priority>HIGH</priority> @@ -156,4 +157,34 @@ </gard> </hwpError> <!-- ******************************************************************** --> + <hwpError> + <sbeError/> + <rc>RC_SPREAD_SPECTRUM_ENABLE_ERR</rc> + <description>Failed to enable Spread Spectrum</description> + <collectRegisterFfdc> + <id>ROOT_CTRL_REGISTERS</id> + <target>MASTER_CHIP</target> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + </collectRegisterFfdc> + <collectRegisterFfdc> + <id>PERV_CTRL_REGISTERS</id> + <target>MASTER_CHIP</target> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + </collectRegisterFfdc> + <collectRegisterFfdc> + <id>REG_FFDC_TOD_STATUS</id> + <target>MASTER_CHIP</target> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + </collectRegisterFfdc> + <ffdc>TOD_TIMER_REG</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + <callout> + <target>MASTER_CHIP</target> + <priority>MEDIUM</priority> + </callout> + <!-- No deconfig or gard as we can keep running without Spread Spectrum as long as the PLL doesn't unlock --> + </hwpError> </hwpErrors> |