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| author | Joe McGill <jmcgill@us.ibm.com> | 2018-02-14 14:51:38 -0600 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2018-02-15 19:21:11 -0500 |
| commit | d2a0b0c1617c8bef53a08f7924cc93b7446512f8 (patch) | |
| tree | 7af5bbb760e922b939276f0d36088d1d365310e6 /src/import | |
| parent | 55603147cd5bdfc5e4290b214c5d67053f6c0786 (diff) | |
| download | talos-sbe-d2a0b0c1617c8bef53a08f7924cc93b7446512f8.tar.gz talos-sbe-d2a0b0c1617c8bef53a08f7924cc93b7446512f8.zip | |
FIR + RAS XML updates
p9_sbe_scominit.C
mask PBCENT FIR bit 5, rely on action of unit master specific FIR bits to
drive attention generation on any cresp address error condition
Change-Id: I3c23aeecd426687fe91d37aadfd5ca6243c4a4b3
CQ: SW417475
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54067
Reviewed-by: Daniel J. Henderson <hende@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com>
Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54082
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C index 29698fd9..0e2a0854 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C @@ -66,8 +66,8 @@ const uint64_t LPC_BAR_MASK = 0xFF000000FFFFFFFFULL; // FBC FIR constants const uint64_t FBC_CENT_FIR_ACTION0 = 0x0000000000000000ULL; -const uint64_t FBC_CENT_FIR_ACTION1 = 0x0440000000000000ULL; -const uint64_t FBC_CENT_FIR_MASK = 0x111FC00000000000ULL; +const uint64_t FBC_CENT_FIR_ACTION1 = 0x0040000000000000ULL; +const uint64_t FBC_CENT_FIR_MASK = 0x151FC00000000000ULL; const uint64_t FBC_WEST_FIR_ACTION0 = 0x0000000000000000ULL; const uint64_t FBC_WEST_FIR_ACTION1 = 0x0000000000000000ULL; const uint64_t FBC_WEST_FIR_MASK = 0x0000FFFFC0000000ULL; |
