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| author | Yue Du <daviddu@us.ibm.com> | 2017-02-13 14:47:21 -0600 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-02-24 07:31:22 -0500 |
| commit | a715e1cbcedd5bfc14944c7d296aee69e3847ff1 (patch) | |
| tree | 76b2e05e8de9e68572d563cb561fd71f10fe54fe /src/import | |
| parent | b20b0bc1eea0552cd684ffc7532d35df8facb502 (diff) | |
| download | talos-sbe-a715e1cbcedd5bfc14944c7d296aee69e3847ff1.tar.gz talos-sbe-a715e1cbcedd5bfc14944c7d296aee69e3847ff1.zip | |
HW399609: DD1 changing core/nest hang limit or hang pulse divider
Change-Id: I580cd70ce3315ea3f2aeb274279a89375f02b05d
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36375
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36382
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.C | 55 | ||||
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml | 4 |
2 files changed, 48 insertions, 11 deletions
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.C index dc4869a1..97572706 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.C +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scominit.C @@ -50,8 +50,23 @@ //----------------------------------------------------------------------------- // Constant Definitions //----------------------------------------------------------------------------- -const uint8_t CORE_HANG_DIVIDER_4X = 0x9F; -const uint8_t CORE_HANG_DIVIDER_64X = 0x7B; + +enum P9_HCD_CORE_SCOMINIT_CONSTANTS +{ + CORE_HANG_LIMIT_3_HANG_PULSES = 0x9F, + CORE_HANG_LIMIT_5_HANG_PULSES = 0x27, + CORE_HANG_LIMIT_10_HANG_PULSES = 0xA1, + CORE_HANG_LIMIT_50_HANG_PULSES = 0x99, + CORE_HANG_LIMIT_100_HANG_PULSES = 0x2D, + CORE_HANG_LIMIT_150_HANG_PULSES = 0xF6, + CORE_HANG_LIMIT_200_HANG_PULSES = 0x64, + + NEST_HANG_LIMIT_20_HANG_PULSES = 0x5F, + NEST_HANG_LIMIT_50_HANG_PULSES = 0x99, + NEST_HANG_LIMIT_100_HANG_PULSES = 0x2D, + NEST_HANG_LIMIT_150_HANG_PULSES = 0xF6, + NEST_HANG_LIMIT_200_HANG_PULSES = 0x64 +}; //----------------------------------------------------------------------------- // Procedure: Core SCOM Inits @@ -63,8 +78,14 @@ p9_hcd_core_scominit( const fapi2::Target<fapi2::TARGET_TYPE_CORE>& i_target) { FAPI_INF(">>p9_hcd_core_scominit"); + fapi2::ReturnCode l_rc; fapi2::buffer<uint64_t> l_data64; - fapi2::ReturnCode l_rc; + uint8_t l_attr_dd1_core_hang_limit; + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> l_chip = + i_target.getParent<fapi2::TARGET_TYPE_PROC_CHIP>(); + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_HW399609, l_chip, + l_attr_dd1_core_hang_limit)); /// @todo RTC158181 how about bit 6? FAPI_DBG("Restore SYNC_CONFIG[8] for stop1"); @@ -77,7 +98,7 @@ p9_hcd_core_scominit( l_data64.setBit<5>().insertFromRight<6, 4>(0xF).insertFromRight<20, 2>(0x3); FAPI_TRY(putScom(i_target, C_THERM_MODE_REG, l_data64)); - // invoke core SCOM initfile + FAPI_DBG("Invoke Core SCOM Initfile"); FAPI_EXEC_HWP(l_rc, p9_core_scom, i_target); if (l_rc) @@ -87,13 +108,25 @@ p9_hcd_core_scominit( goto fapi_try_exit; } - // update core hang pulse dividers - FAPI_TRY(getScom(i_target, C_HANG_CONTROL, l_data64), - "Error from getScom (C_HANG_CONTROL)"); - l_data64.insertFromRight<C_HANG_CONTROL_CORE_LIMIT, C_HANG_CONTROL_CORE_LIMIT_LEN>(CORE_HANG_DIVIDER_4X); - l_data64.insertFromRight<C_HANG_CONTROL_NEST_LIMIT, C_HANG_CONTROL_NEST_LIMIT_LEN>(CORE_HANG_DIVIDER_64X); - FAPI_TRY(putScom(i_target, C_HANG_CONTROL, l_data64), - "Error from putScom (C_HANG_CONTROL)"); + FAPI_DBG("Update Core Hang Pulse Dividers via C_HANG_CONTROL[0-15]"); + FAPI_TRY(getScom(i_target, C_HANG_CONTROL, l_data64)); + + if (l_attr_dd1_core_hang_limit) + { + l_data64.insertFromRight<C_HANG_CONTROL_CORE_LIMIT, + C_HANG_CONTROL_CORE_LIMIT_LEN>(CORE_HANG_LIMIT_100_HANG_PULSES); + } + else + { + l_data64.insertFromRight<C_HANG_CONTROL_CORE_LIMIT, + C_HANG_CONTROL_CORE_LIMIT_LEN>(CORE_HANG_LIMIT_3_HANG_PULSES); + } + + l_data64.insertFromRight<C_HANG_CONTROL_NEST_LIMIT, + C_HANG_CONTROL_NEST_LIMIT_LEN>(NEST_HANG_LIMIT_100_HANG_PULSES); + + FAPI_TRY(putScom(i_target, C_HANG_CONTROL, l_data64)); + fapi_try_exit: diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml index 6a82619c..718bcab1 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml @@ -346,6 +346,10 @@ attribute tank <virtual/> </entry> <entry> + <name>ATTR_CHIP_EC_FEATURE_HW399609</name> + <virtual/> + </entry> + <entry> <name>ATTR_CHIP_EC_FEATURE_LPC_RESET_GPIO</name> <virtual/> </entry> |
