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authorYUE DU <daviddu@us.ibm.com>2017-02-07 17:09:16 -0500
committerSachin Gupta <sgupta2m@in.ibm.com>2017-02-09 05:28:05 -0500
commit602f35b29826dd7a2ded096c3e7254366962dcdc (patch)
treef85e7d20132131b7dba18d0bc9855518b02892b8 /src/import
parent4faf3303c7cd57dbcf66917990fbc0a973637b30 (diff)
downloadtalos-sbe-602f35b29826dd7a2ded096c3e7254366962dcdc.tar.gz
talos-sbe-602f35b29826dd7a2ded096c3e7254366962dcdc.zip
Revert "Hcode: Drop chiplet fence after scominit and scomcust hwp."
This reverts commit 8da1c05a2580a96b3cc4a46b8cd25ecce06ee208. Change-Id: I6c23f3a6dadc1b55a3df8f2d879fe225f227a639 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36067 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36157 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import')
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C79
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H28
-rw-r--r--src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C6
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C51
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H23
-rw-r--r--src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C3
6 files changed, 113 insertions, 77 deletions
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C
index d7047ce4..b2c3c296 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.C
@@ -24,49 +24,70 @@
/* IBM_PROLOG_END_TAG */
///
/// @file p9_hcd_cache_scomcust.C
-/// @brief Cache Customization SCOMs
+/// @brief Core Chiplet PCB Arbitration
+///
+/// *HWP HWP Owner : David Du <daviddu@us.ibm.com>
+/// *HWP FW Owner : Sangeetha T S <sangeet2@in.ibm.com>
+/// *HWP Team : PM
+/// *HWP Consumed by : SBE:SGPE
+/// *HWP Level : 1
+///
+/// Procedure Summary:
+/// If CME, request PCB Mux.
+/// Poll for PCB Mux grant
+/// Else (SBE)
+/// Nop (as the CME is not running in bringing up the first Core)
///
-
-// *HWP HWP Owner : David Du <daviddu@us.ibm.com>
-// *HWP Backup HWP Owner : Greg Still <stillgs@us.ibm.com>
-// *HWP FW Owner : Sangeetha T S <sangeet2@in.ibm.com>
-// *HWP Team : PM
-// *HWP Consumed by : SBE:SGPE
-// *HWP Level : 2
//------------------------------------------------------------------------------
// Includes
//------------------------------------------------------------------------------
-
-#include <p9_quad_scom_addresses.H>
-#include <p9_hcd_common.H>
+#include <fapi2.H>
+//#include <common_scom_addresses.H>
+//will be replaced with real scom address header file
#include "p9_hcd_cache_scomcust.H"
//------------------------------------------------------------------------------
// Constant Definitions: Core Chiplet PCB Arbitration
//------------------------------------------------------------------------------
-fapi2::ReturnCode
-p9_hcd_cache_scomcust(
- const fapi2::Target<fapi2::TARGET_TYPE_EQ>& i_target)
+extern "C"
{
- FAPI_INF(">>p9_hcd_cache_scomcust");
- fapi2::buffer<uint64_t> l_data64;
- uint8_t l_attr_system_ipl_phase;
- fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> l_sys;
- FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SYSTEM_IPL_PHASE, l_sys,
- l_attr_system_ipl_phase));
-
- if (l_attr_system_ipl_phase != fapi2::ENUM_ATTR_SYSTEM_IPL_PHASE_CACHE_CONTAINED)
+ fapi2::ReturnCode
+ p9_hcd_cache_scomcust(
+ const fapi2::Target<fapi2::TARGET_TYPE_EQ>& i_target)
{
- FAPI_DBG("Drop chiplet fence via NET_CTRL0[18]");
- FAPI_TRY(putScom(i_target, EQ_NET_CTRL0_WAND, MASK_UNSET(18)));
- }
-fapi_try_exit:
+#if 0
+
+ fapi2::buffer<uint64_t> data;
+
+ //Dynamically built (and installed) routine that is inserted by the .XIP
+ //Customization. process. (New for P9)
+ //(TODO: this part of the process is a placeholder at this point)
+ //Dynamically built pointer where a NULL is checked before execution
+ //If NULL (a potential early value); return
+ //Else call the function at the pointer;
+ //pointer is filled in by XIP Customization
+ //Customization items:
+ //Epsilon settings scan flush to super safe
+ //Customize Epsilon settings for system config
+ //LCO setup (chiplet specific)
+ //FW setups up based victim caches
+
+ return fapi2::FAPI2_RC_SUCCESS;
+
+ FAPI_CLEANUP();
+ return fapi2::FAPI2_RC_PLAT_ERR_SEE_DATA;
+
+#endif
+
+ return fapi2::FAPI2_RC_SUCCESS;
+
+ } // Procedure
+
+
+} // extern C
- FAPI_INF("<<p9_hcd_cache_scomcust");
- return fapi2::current_err;
-}
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H
index 7b81c7c6..4da4fc24 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scomcust.H
@@ -24,28 +24,25 @@
/* IBM_PROLOG_END_TAG */
///
/// @file p9_hcd_cache_scomcust.H
-/// @brief Cache Customization SCOMs
+/// @brief Core Chiplet PCB Arbitration
+///
+/// *HWP HWP Owner : David Du <daviddu@us.ibm.com>
+/// *HWP FW Owner : Sangeetha T S <sangeet2@in.ibm.com>
+/// *HWP Team : PM
+/// *HWP Consumed by : SBE:SGPE
+/// *HWP Level : 1
///
-
-// *HWP HWP Owner : David Du <daviddu@us.ibm.com>
-// *HWP Backup HWP Owner : Greg Still <stillgs@us.ibm.com>
-// *HWP FW Owner : Sangeetha T S <sangeet2@in.ibm.com>
-// *HWP Team : PM
-// *HWP Consumed by : SBE:SGPE
-// *HWP Level : 2
#ifndef __P9_HCD_CACHE_SCOMCUST_H__
#define __P9_HCD_CACHE_SCOMCUST_H__
-
-#include <fapi2.H>
+extern "C"
+{
/// @typedef p9_hcd_cache_scomcust_FP_t
/// function pointer typedef definition for HWP call support
-typedef fapi2::ReturnCode (*p9_hcd_cache_scomcust_FP_t) (
- const fapi2::Target<fapi2::TARGET_TYPE_EQ>&);
+ typedef fapi2::ReturnCode (*p9_hcd_cache_scomcust_FP_t) (
+ const fapi2::Target<fapi2::TARGET_TYPE_EQ>&);
-extern "C"
-{
/// @brief Core Chiplet PCB Arbitration
///
@@ -59,6 +56,7 @@ extern "C"
p9_hcd_cache_scomcust(
const fapi2::Target<fapi2::TARGET_TYPE_EQ>& i_target);
-}
+
+} // extern C
#endif // __P9_HCD_CACHE_SCOMCUST_H__
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C
index 2af5e4f2..c5b07b37 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_startclocks.C
@@ -313,6 +313,12 @@ p9_hcd_cache_startclocks(
// Cleaning up
// -------------------------------
+ if (l_attr_system_ipl_phase != fapi2::ENUM_ATTR_SYSTEM_IPL_PHASE_CACHE_CONTAINED)
+ {
+ FAPI_DBG("Drop chiplet fence via NET_CTRL0[18]");
+ FAPI_TRY(putScom(i_target, EQ_NET_CTRL0_WAND, MASK_UNSET(18)));
+ }
+
/// @todo RTC158181 ignore xstop checkstop in sim, review for lab
/*
FAPI_DBG("Check the Global Checkstop FIR");
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C
index 96cbb041..842f605d 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C
@@ -26,6 +26,12 @@
/// @file p9_hcd_core_scomcust.C
/// @brief Core Customization SCOMs
///
+/// *HWP HWP Owner : David Du <daviddu@us.ibm.com>
+/// *HWP FW Owner : Reshmi Nair <resnair5@in.ibm.com>
+/// *HWP Team : PM
+/// *HWP Consumed by : SBE:CME
+/// *HWP Level : 1
+///
/// Procedure Summary:
/// Dynamically built (and installed) routine that is inserted by the .XIP
/// Customization. process. (New for P9) (TODO: this part of the process is
@@ -34,41 +40,44 @@
/// If NULL (a potential early value); return
/// Else call the function at the pointer;
/// pointer is filled in by XIP Customization
-
-// *HWP HWP Owner : David Du <daviddu@us.ibm.com>
-// *HWP Backup HWP Owner : Greg Still <stillgs@us.ibm.com>
-// *HWP FW Owner : Sangeetha T S <sangeet2@in.ibm.com>
-// *HWP Team : PM
-// *HWP Consumed by : SBE:CME
-// *HWP Level : 2
+///
//-----------------------------------------------------------------------------
// Includes
//-----------------------------------------------------------------------------
-
-#include <p9_quad_scom_addresses.H>
-#include <p9_hcd_common.H>
+#include <fapi2.H>
+//#include <common_scom_addresses.H>
+//will be replaced with real scom address header file
#include "p9_hcd_core_scomcust.H"
//-----------------------------------------------------------------------------
// Constant Definitions: Core Customization SCOMs
//-----------------------------------------------------------------------------
-fapi2::ReturnCode
-p9_hcd_core_scomcust(
- const fapi2::Target<fapi2::TARGET_TYPE_CORE>& i_target)
+extern "C"
{
- FAPI_INF(">>p9_hcd_core_scomcust");
- fapi2::buffer<uint64_t> l_data64;
- FAPI_DBG("Drop chiplet fence via NET_CTRL0[18]");
- FAPI_TRY(putScom(i_target, C_NET_CTRL0_WAND, MASK_UNSET(18)));
+ fapi2::ReturnCode
+ p9_hcd_core_scomcust(
+ const fapi2::Target<fapi2::TARGET_TYPE_CORE>& i_target)
+ {
+
+#if 0
+
+ fapi2::buffer<uint64_t> data;
+
+ return fapi2::FAPI2_RC_SUCCESS;
+
+ FAPI_CLEANUP();
+ return fapi2::FAPI2_RC_PLAT_ERR_SEE_DATA;
+
+#endif
+
+ return fapi2::FAPI2_RC_SUCCESS;
-fapi_try_exit:
+ } // Procedure
- FAPI_INF("<<p9_hcd_core_scomcust");
- return fapi2::current_err;
-}
+} // extern C
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H
index 6f7d2169..f55230bf 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.H
@@ -26,26 +26,25 @@
/// @file p9_hcd_core_scomcust.H
/// @brief Core Customization SCOMs
///
+/// *HWP HWP Owner : David Du <daviddu@us.ibm.com>
+/// *HWP FW Owner : Reshmi Nair <resnair5@in.ibm.com>
+/// *HWP Team : PM
+/// *HWP Consumed by : SBE:CME
+/// *HWP Level : 1
+///
-// *HWP HWP Owner : David Du <daviddu@us.ibm.com>
-// *HWP Backup HWP Owner : Greg Still <stillgs@us.ibm.com>
-// *HWP FW Owner : Sangeetha T S <sangeet2@in.ibm.com>
-// *HWP Team : PM
-// *HWP Consumed by : SBE:CME
-// *HWP Level : 2
#ifndef __P9_HCD_CORE_SCOMCUST_H__
#define __P9_HCD_CORE_SCOMCUST_H__
-#include <fapi2.H>
+extern "C"
+{
/// @typedef p9_hcd_core_scomcust_FP_t
/// function pointer typedef definition for HWP call support
-typedef fapi2::ReturnCode (*p9_hcd_core_scomcust_FP_t) (
- const fapi2::Target<fapi2::TARGET_TYPE_CORE>&);
+ typedef fapi2::ReturnCode (*p9_hcd_core_scomcust_FP_t) (
+ const fapi2::Target<fapi2::TARGET_TYPE_CORE>&);
-extern "C"
-{
/// @brief Core Customization SCOMs
///
@@ -59,6 +58,6 @@ extern "C"
p9_hcd_core_scomcust(
const fapi2::Target<fapi2::TARGET_TYPE_CORE>& i_target);
-}
+} // extern C
#endif // __P9_HCD_CORE_SCOMCUST_H__
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C
index 3aa5d1ba..d26fb42c 100644
--- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C
+++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_startclocks.C
@@ -273,6 +273,9 @@ p9_hcd_core_startclocks(
// Cleaning up
// -------------------------------
+ FAPI_DBG("Drop chiplet fence via NET_CTRL0[18]");
+ FAPI_TRY(putScom(i_target, C_NET_CTRL0_WAND, MASK_UNSET(18)));
+
/// @todo RTC158181 ignore xstop checkstop in sim, review for lab
/*
FAPI_DBG("Check the Global Checkstop FIR");
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