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| author | Christopher M. Riedl <cmriedl@us.ibm.com> | 2017-05-05 21:05:19 -0500 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-05-12 22:28:15 -0400 |
| commit | 28122f67d8a0a5aebf83cb910d27fde36d91cc81 (patch) | |
| tree | cdd85f354373d06c81fa291684d717418d5c271d /src/import | |
| parent | 8fb3f52276fd37466afb34b85a1dbda3c8ee3e9f (diff) | |
| download | talos-sbe-28122f67d8a0a5aebf83cb910d27fde36d91cc81.tar.gz talos-sbe-28122f67d8a0a5aebf83cb910d27fde36d91cc81.zip | |
Pstate: Remove legacy VDM code
- Remove legacy VDM code in preparation for actual VDM enablement commit
- VDM enablement only occurs during istep15
- Does not introduce any inter-platform dependencies
Change-Id: Ia46661f6133e2556bee0464a95c7109658a86beb
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40185
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40221
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import')
4 files changed, 8 insertions, 25 deletions
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.C index f75bbb27..bb1715ad 100644 --- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.C +++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_chiplet_l3_dcc_setup.C @@ -49,7 +49,6 @@ fapi2::ReturnCode p9_hcd_cache_chiplet_l3_dcc_setup(const { const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM; fapi2::buffer<uint64_t> l_data64; - uint8_t l_read_attr = 0; FAPI_DBG("Entering ..."); FAPI_DBG("Scan eq_ana_bndy_bucket_l3dcc ring"); @@ -63,19 +62,6 @@ fapi2::ReturnCode p9_hcd_cache_chiplet_l3_dcc_setup(const l_data64.clearBit<C_NET_CTRL1_CLK_DCC_BYPASS_EN>(); FAPI_TRY(fapi2::putScom(i_target_chiplet, EQ_NET_CTRL1_WAND, l_data64)); - FAPI_DBG("Check if VDMs are to be enabled. If so, power them on"); - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_VDM_ENABLE, FAPI_SYSTEM, - l_read_attr)); - - if( l_read_attr ) - { - - l_data64.flush<0>(); - l_data64.setBit<0>(); - FAPI_TRY(fapi2::putScom(i_target_chiplet, EQ_PPM_VDMCR_OR, l_data64)); - - } - FAPI_DBG("Exiting ..."); fapi_try_exit: diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_stopclocks.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_stopclocks.C index 0e0ce85c..0f155e64 100644 --- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_stopclocks.C +++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_stopclocks.C @@ -265,7 +265,11 @@ p9_hcd_cache_stopclocks( if (l_attr_vdm_enable == fapi2::ENUM_ATTR_VDM_ENABLE_ON) { - FAPI_DBG("Drop vdm enable via QPPM_VDMCR[0]"); + FAPI_DBG("Clear Jump Protect Enable via DPLL_CTRL[1] (no need to poll DPLL_STAT)"); + FAPI_TRY(putScom(i_target, EQ_QPPM_DPLL_CTRL_CLEAR, MASK_SET(1))); + FAPI_DBG("Set VDM Disable via QPPM_VDMCR[1]"); + FAPI_TRY(putScom(i_target, EQ_PPM_VDMCR_OR, MASK_SET(1))); + FAPI_DBG("Drop VDM Poweron via QPPM_VDMCR[0]"); FAPI_TRY(putScom(i_target, EQ_PPM_VDMCR_CLEAR, MASK_SET(0))); } diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.C index 8ed88fbc..a9df9858 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.C +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_chiplet_reset.C @@ -87,12 +87,10 @@ p9_hcd_core_chiplet_reset( FAPI_INF(">>p9_hcd_core_chiplet_reset"); fapi2::buffer<uint64_t> l_data64; uint8_t l_attr_dpll_bypass; - uint8_t l_attr_vdm_enable; const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> l_sys; auto l_chip = i_target.getParent<fapi2::TARGET_TYPE_PROC_CHIP>(); FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_DPLL_BYPASS, l_chip, l_attr_dpll_bypass)); - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_VDM_ENABLE, l_sys, l_attr_vdm_enable)); //-------------------------- // Reset core chiplet logic @@ -186,13 +184,6 @@ p9_hcd_core_chiplet_reset( p9hcd::SCAN0_TYPE_ALL_BUT_GPTR_REPR_TIME)); } #endif - - if (l_attr_vdm_enable == fapi2::ENUM_ATTR_VDM_ENABLE_ON) - { - FAPI_DBG("Assert vdm enable via CPPM_VDMCR[0]"); - FAPI_TRY(putScom(i_target, C_PPM_VDMCR_OR, MASK_SET(0))); - } - // content of p9_hcd_core_dcc_skewadjust below: FAPI_DBG("Drop core DCC bypass via NET_CTRL[1]"); diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_stopclocks.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_stopclocks.C index 66a8ba66..892d3b45 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_stopclocks.C +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_stopclocks.C @@ -242,7 +242,9 @@ p9_hcd_core_stopclocks( if (l_attr_vdm_enable == fapi2::ENUM_ATTR_VDM_ENABLE_ON) { - FAPI_DBG("Drop vdm enable via CPPM_VDMCR[0]"); + FAPI_DBG("Set VDM Disable via CPPM_VDMCR[1]"); + FAPI_TRY(putScom(i_target, C_PPM_VDMCR_OR, MASK_SET(1))); + FAPI_DBG("Drop VDM Poweron via CPPM_VDMCR[0]"); FAPI_TRY(putScom(i_target, C_PPM_VDMCR_CLEAR, MASK_SET(0))); } |
