Tracearray HWP L2

Change-Id: I2fbb02f8dc372f37aa725e26fb5ee2dd307ac275
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34191
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35795
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>

2 files changed, 156 insertions, 101 deletions

diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.C
index 867869a7..4f1e4ca6 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.C
@@ -43,7 +43,7 @@
 // *HWP FW Owner        : Shakeeb Pasha<shakeebbk@in.ibm.com>
 // *HWP Team            : Perv
 // *HWP Level           : 1
-// *HWP Consumed by     : SBE
+// *HWP Consumed by     : Cronus, SBE
 //------------------------------------------------------------------------------
 //-----------------------------------------------------------------------------------
 // Includes
@@ -91,7 +91,6 @@ const uint32_t TRCTRL_MUX0_SEL_LEN       = 2;
 const uint32_t TRACE_MUX_POSITIONS       = 1 << TRCTRL_MUX0_SEL_LEN;
 
 const uint32_t TA_BASE_SCOM_MULTIPLIER = 0x00000040;
-const uint32_t TA_EX_OFFSET_MULTIPLIER = 0x00000040;
 const uint32_t TA_DEBUG_BASE_SCOM      = 0x000107C0;
 const uint32_t TA_TRACE_BASE_SCOM      = 0x00010400;
 //------------------------------------------------------------------------------
@@ -102,72 +101,70 @@ struct ta_def
 {
     /* One entry per mux setting; value of 0 means N/A */
     p9_tracearray_bus_id bus_ids[TRACE_MUX_POSITIONS];
-    const uint8_t chiplet;
-    const uint8_t base_multiplier;
-    const uint8_t ex_multiplier;
-};
+    const uint8_t ex_odd_scom_offset: 2;
+        const uint8_t chiplet: 6;
+        const uint8_t base_multiplier;
+    };
 
-static const ta_def ta_defs[] =
+    static const ta_def ta_defs[] =
 {
     /* PERV */
-    { { PROC_TB_PIB, PROC_TB_OCC, PROC_TB_TOD },                       0x01,    0x00, 0x00},
-    { { PROC_TB_SBE, PROC_TB_PIB_ALT },                                0x01,    0x01, 0x00},
+    { { PROC_TB_PIB, PROC_TB_OCC, PROC_TB_TOD },                       0x00, 0x01, 0x00},
+    { { PROC_TB_SBE, PROC_TB_PIB_ALT },                                0x00, 0x01, 0x01},
     /* N0 */
-    { { PROC_TB_PBIOE0 },                                              0x02,    0x00, 0x00},
-    { { PROC_TB_PBIOE1 },                                              0x02,    0x01, 0x00},
-    { { PROC_TB_CXA0, PROC_TB_NX },                                    0x02,    0x02, 0x00},
+    { { PROC_TB_PBIOE0 },                                              0x00, 0x02, 0x00},
+    { { PROC_TB_PBIOE1 },                                              0x00, 0x02, 0x01},
+    { { PROC_TB_CXA0, PROC_TB_NX },                                    0x00, 0x02, 0x02},
     /* N1 */
-    { { PROC_TB_PB6    },                                              0x03,      0x00, 0x00},
-    { { PROC_TB_PB7    },                                              0x03,      0x01, 0x00},
-    { { PROC_TB_PB8    },                                              0x03,      0x02, 0x00},
-    { { PROC_TB_PB9    },                                              0x03,      0x03, 0x00},
-    { { PROC_TB_PB10   },                                              0x03,      0x04, 0x00},
-    { { PROC_TB_PB11   },                                              0x03,      0x05, 0x00},
-    { { PROC_TB_MCD0, PROC_TB_MCD1, PROC_TB_VAS },                     0x03,      0x06, 0x00},
-    { { PROC_TB_MCS2, PROC_TB_MCS3, PROC_TB_PB13 },                    0x03,      0x07, 0x00},
-    { { PROC_TB_PBIO0  },                                              0x03,      0x08, 0x00},
-    { { PROC_TB_PBIO1  },                                              0x03,      0x09, 0x00},
+    { { PROC_TB_PB6    },                                              0x00, 0x03, 0x00},
+    { { PROC_TB_PB7    },                                              0x00, 0x03, 0x01},
+    { { PROC_TB_PB8    },                                              0x00, 0x03, 0x02},
+    { { PROC_TB_PB9    },                                              0x00, 0x03, 0x03},
+    { { PROC_TB_PB10   },                                              0x00, 0x03, 0x04},
+    { { PROC_TB_PB11   },                                              0x00, 0x03, 0x05},
+    { { PROC_TB_MCD0, PROC_TB_MCD1, PROC_TB_VAS },                     0x00, 0x03, 0x06},
+    { { PROC_TB_MCS2, PROC_TB_MCS3, PROC_TB_PB13 },                    0x00, 0x03, 0x07},
+    { { PROC_TB_PBIO0  },                                              0x00, 0x03, 0x08},
+    { { PROC_TB_PBIO1  },                                              0x00, 0x03, 0x09},
     /* N2 */
-    { { PROC_TB_CXA1, PROC_TB_IOPSI },                                 0x04,      0x00, 0x00},
-    { { PROC_TB_PCIS0, PROC_TB_PCIS1, PROC_TB_PCIS2 },                 0x04,      0x01, 0x00},
+    { { PROC_TB_CXA1, PROC_TB_IOPSI },                                 0x00, 0x04, 0x00},
+    { { PROC_TB_PCIS0, PROC_TB_PCIS1, PROC_TB_PCIS2 },                 0x00, 0x04, 0x01},
     /* N3 */
-    { { PROC_TB_PB0    },                                              0x05,      0x00, 0x00},
-    { { PROC_TB_PB1    },                                              0x05,      0x01, 0x00},
-    { { PROC_TB_PB2    },                                              0x05,      0x02, 0x00},
-    { { PROC_TB_PB3    },                                              0x05,      0x03, 0x00},
-    { { PROC_TB_PB4    },                                              0x05,      0x04, 0x00},
-    { { PROC_TB_PB5    },                                              0x05,      0x05, 0x00},
-    { { PROC_TB_INT, PROC_TB_NPU1, PROC_TB_NMMU1 },                    0x05,      0x06, 0x00},
-    { { PROC_TB_MCS0, PROC_TB_MCS1, PROC_TB_PB12 },                    0x05,      0x07, 0x00},
-    { { PROC_TB_BRIDGE },                                              0x05,      0x08, 0x00},
-    { { PROC_TB_NPU0   },                                              0x05,      0x0A, 0x00},
-    { { PROC_TB_NMMU0  },                                              0x05,      0x0B, 0x00},
+    { { PROC_TB_PB0    },                                              0x00, 0x05, 0x00},
+    { { PROC_TB_PB1    },                                              0x00, 0x05, 0x01},
+    { { PROC_TB_PB2    },                                              0x00, 0x05, 0x02},
+    { { PROC_TB_PB3    },                                              0x00, 0x05, 0x03},
+    { { PROC_TB_PB4    },                                              0x00, 0x05, 0x04},
+    { { PROC_TB_PB5    },                                              0x00, 0x05, 0x05},
+    { { PROC_TB_INT, PROC_TB_NPU1, PROC_TB_NMMU1 },                    0x00, 0x05, 0x06},
+    { { PROC_TB_MCS0, PROC_TB_MCS1, PROC_TB_PB12 },                    0x00, 0x05, 0x07},
+    { { PROC_TB_BRIDGE },                                              0x00, 0x05, 0x08},
+    { { PROC_TB_NPU0   },                                              0x00, 0x05, 0x0A},
+    { { PROC_TB_NMMU0  },                                              0x00, 0x05, 0x0B},
     /* XBUS */
-    { { PROC_TB_PBIOX0, PROC_TB_IOX0 },                                0x06,  0x00, 0x00},
-    { { PROC_TB_PBIOX1, PROC_TB_IOX1 },                                0x06,  0x01, 0x00},
-    { { PROC_TB_PBIOX2, PROC_TB_IOX2 },                                0x06,  0x03, 0x00},
+    { { PROC_TB_PBIOX0, PROC_TB_IOX0 },                                0x00, 0x06, 0x00},
+    { { PROC_TB_PBIOX1, PROC_TB_IOX1 },                                0x00, 0x06, 0x01},
+    { { PROC_TB_PBIOX2, PROC_TB_IOX2 },                                0x00, 0x06, 0x02},
     /* PCIx */
-    { { PROC_TB_PCI0X, PROC_TB_PCI00 },                                0x0D,      0x00, 0x00},
-    { { PROC_TB_PCI1X, PROC_TB_PCI11, PROC_TB_PCI12 },                 0x0E,      0x00, 0x00},
-    { { PROC_TB_PCI2X, PROC_TB_PCI23, PROC_TB_PCI24, PROC_TB_PCI25 },  0x0F,      0x00, 0x00},
+    { { PROC_TB_PCI0X, PROC_TB_PCI00 },                                0x00, 0x0D, 0x00},
+    { { PROC_TB_PCI1X, PROC_TB_PCI11, PROC_TB_PCI12 },                 0x00, 0x0E, 0x00},
+    { { PROC_TB_PCI2X, PROC_TB_PCI23, PROC_TB_PCI24, PROC_TB_PCI25 },  0x00, 0x0F, 0x00},
     /* OBUS */
-    { { PROC_TB_PBIOOA, PROC_TB_IOO },                                 0x09, 0x00, 0x00},
+    { { PROC_TB_PBIOOA, PROC_TB_IOO },                                 0x00, 0x09, 0x00},
     /* MC */
-    { { PROC_TB_MCA0   },                                              0x07,      0x20, 0x00},
-    { { PROC_TB_MCA1   },                                              0x07,      0x21, 0x00},
-    { { PROC_TB_IOMC0, PROC_TB_IOMC1, PROC_TB_IOMC2, PROC_TB_IOMC3  }, 0x07,      0x00, 0x00},
+    { { PROC_TB_MCA0   },                                              0x00, 0x07, 0x20},
+    { { PROC_TB_MCA1   },                                              0x00, 0x07, 0x21},
+    { { PROC_TB_IOMC0, PROC_TB_IOMC1, PROC_TB_IOMC2, PROC_TB_IOMC3  }, 0x00, 0x07, 0x00},
     /* EX */
-    { { PROC_TB_L20, NO_TB, NO_TB, PROC_TB_SKIT10 },                   0x10,      0x94, 0x0C},
-    { { PROC_TB_L21, NO_TB, NO_TB, PROC_TB_SKIT11 },                   0x10,      0x95, 0x0C},
-    { { PROC_TB_L30, PROC_TB_NCU0, PROC_TB_CME, PROC_TB_EQPB },        0x10,      0x00, 0x02},
-    { { PROC_TB_L31, PROC_TB_NCU1, PROC_TB_IVRM, PROC_TB_SKEWADJ },    0x10,      0x01, 0x02},
+    { { PROC_TB_L20, NO_TB, NO_TB, PROC_TB_SKIT10 },                   0x01, 0x10, 0x94},
+    { { PROC_TB_L21, NO_TB, NO_TB, PROC_TB_SKIT11 },                   0x01, 0x10, 0x95},
+    { { PROC_TB_L30, PROC_TB_NCU0, PROC_TB_CME, PROC_TB_EQPB },        0x02, 0x10, 0x00},
+    { { PROC_TB_L31, PROC_TB_NCU1, PROC_TB_IVRM, PROC_TB_SKEWADJ },    0x02, 0x10, 0x01},
     /* CORE */
-    { { PROC_TB_CORE0  },                                              0x20,         0x01, 0x00},
-    { { PROC_TB_CORE1  },                                              0x20,         0x02, 0x00},
+    { { PROC_TB_CORE0  },                                              0x00, 0x20, 0x41},
+    { { PROC_TB_CORE1  },                                              0x00, 0x20, 0x42},
 };
 
-#define ARRAY_SIZE(array) (sizeof(array) / sizeof(array[0]))
-
 class TraceArrayFinder
 {
     public:
@@ -186,24 +183,15 @@ class TraceArrayFinder
                 {
                     if(l_ta_def.bus_ids[sel] == i_trace_bus)
                     {
-                        fapi2::buffer<uint32_t> l_buffer;
-                        l_buffer.insert<0, 8>(l_ta_def.chiplet);
+                        uint32_t l_buffer = 0;
+                        l_buffer |= l_ta_def.chiplet << 24;
                         debug_scom_base = l_buffer | TA_DEBUG_BASE_SCOM;
 
                         trace_scom_base = l_buffer |
                                           (TA_TRACE_BASE_SCOM +
                                            TA_BASE_SCOM_MULTIPLIER *
                                            l_ta_def.base_multiplier);
-
-                        // Special handling Core
-                        if(l_ta_def.chiplet == 0x20)
-                        {
-                            trace_scom_base &= 0x00FFFFFF;
-                        }
-
-                        ex_odd_scom_offset = TA_EX_OFFSET_MULTIPLIER *
-                                             l_ta_def.ex_multiplier;
-
+                        ex_odd_scom_offset = l_ta_def.ex_odd_scom_offset;
                         mux_sel = sel;
                         return;
                     }
@@ -217,7 +205,7 @@ class TraceArrayFinder
 //-----------------------------------------------------------------------------
 fapi2::ReturnCode p9_sbe_tracearray(
     const fapi2::Target<P9_SBE_TRACEARRAY_TARGET_TYPES>& i_target,
-    const p9_sbe_tracearray_args& i_args,
+    const proc_gettracearray_args& i_args,
     uint64_t* o_ta_data,
     const uint32_t i_cur_row,
     const uint32_t i_num_rows
@@ -235,15 +223,28 @@ fapi2::ReturnCode p9_sbe_tracearray(
     const uint32_t DEBUG_TRACE_CONTROL = l_ta_finder.debug_scom_base +
                                          DEBUG_TRACE_CONTROL_OFS;
     const uint32_t TRACE_SCOM_BASE     = l_ta_finder.trace_scom_base;
-    const uint32_t TRACE_SCOM_OFFSET   = l_ta_finder.ex_odd_scom_offset;
+    uint32_t tra_scom_offset = 0;
+    uint32_t l_proc_offset = 0;
 
     if ((arg_type & ta_type) == 0)
     {
-        FAPI_ERR("Specified trace array requires target type 0x%X,"
+        FAPI_ERR("Specified trace array requires target type 0x%X, "
                  "but the supplied target is of type 0x%X", ta_type, arg_type);
         return fapi2::RC_PROC_GETTRACEARRAY_INVALID_TARGET;
     }
 
+    /* There is no support for OBUS and MCBIST on SBE.
+     * These are passed as PERV targets, but have to be converted to
+     * PROC with manual address offset for chiplet, as trace scoms
+     * are not allowed for PERV targets in Cronus */
+    const uint8_t l_chiplet_num = i_target.getChipletNumber();
+
+    if(IS_MCBIST(l_chiplet_num) || IS_OBUS(l_chiplet_num))
+    {
+        target = i_target.getParent<fapi2::TARGET_TYPE_PROC_CHIP>();
+        l_proc_offset = (l_chiplet_num << 24) - (TRACE_SCOM_BASE & 0xFF000000);
+    }
+
     /* Nimbus DD1 core traces can't be read out via SCOM.
      * Check an EC feature to see if that's fixed. */
     if (ta_type == fapi2::TARGET_TYPE_CORE)
@@ -254,12 +255,12 @@ fapi2::ReturnCode p9_sbe_tracearray(
             i_target.getParent<fapi2::TARGET_TYPE_PROC_CHIP>();
         FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_CORE_TRACE_SCOMABLE,
                                proc_target, l_core_trace_scomable),
-                 "Failed to query chip EC feature"
+                 "Failed to query chip EC feature "
                  "ATTR_CHIP_EC_FEATURE_CORE_TRACE_SCOMABLE");
 
         if (!l_core_trace_scomable)
         {
-            FAPI_ERR("Core arrays cannot be dumped in this chip EC;"
+            FAPI_ERR("Core arrays cannot be dumped in this chip EC; "
                      "please use fastarray instead.");
             return fapi2::RC_PROC_GETTRACEARRAY_CORE_NOT_DUMPABLE;
         }
@@ -270,6 +271,23 @@ fapi2::ReturnCode p9_sbe_tracearray(
     if (ta_type == fapi2::TARGET_TYPE_EX)
     {
         target = i_target.getParent<fapi2::TARGET_TYPE_EQ>();
+        uint8_t l_chipunit_num;
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS,
+                               i_target,
+                               l_chipunit_num),
+                 "Failed to get chipUnit ID from EX target");
+
+        if (l_chipunit_num & 1)
+        {
+            if(l_ta_finder.ex_odd_scom_offset == 0x01)
+            {
+                tra_scom_offset = EX_L21_SCOM_OFFSET;
+            }
+            else if(l_ta_finder.ex_odd_scom_offset == 0x02)
+            {
+                tra_scom_offset = EX_L31_SCOM_OFFSET;
+            }
+        }
     }
 
     /* Check that the trace mux is set up as expected */
@@ -277,7 +295,10 @@ fapi2::ReturnCode p9_sbe_tracearray(
     {
         fapi2::buffer<uint64_t> buf;
         FAPI_TRY(fapi2::getScom(target,
-                                TRACE_SCOM_BASE + TRACE_SCOM_OFFSET + TRACE_TRCTRL_CONFIG_OFS,
+                                (TRACE_SCOM_BASE +
+                                 tra_scom_offset +
+                                 TRACE_TRCTRL_CONFIG_OFS +
+                                 l_proc_offset),
                                 buf),
                  "Failed to read current trace mux setting");
         uint32_t cur_sel = 0;
@@ -295,25 +316,29 @@ fapi2::ReturnCode p9_sbe_tracearray(
     /* If control is requested along with dump, pre dump condition
      * should run only once.
      * */
-    if (i_args.stop_pre_dump && (!i_args.collect_dump || (i_cur_row == 0)))
+    if (i_args.stop_pre_dump && (!i_args.collect_dump ||
+                                 (i_cur_row == P9_TRACEARRAY_FIRST_ROW)))
     {
         FAPI_DBG("Stopping trace arrays");
         fapi2::buffer<uint64_t> buf;
         buf.flush<0>().setBit<DEBUG_TRACE_CONTROL_STOP>();
-        FAPI_TRY(fapi2::putScom(target, DEBUG_TRACE_CONTROL, buf),
+        FAPI_TRY(fapi2::putScom(target, DEBUG_TRACE_CONTROL + l_proc_offset, buf),
                  "Failed to stop chiplet domain trace arrays");
     }
 
     if (i_args.collect_dump)
     {
-        fapi2::buffer<uint64_t> buf;
+        fapi2::buffer<uint64_t> buf = 0;
 
         /* Start with the low data register because that's where the
          * "trace running" bit is. */
         for (uint32_t i = 0; i < i_num_rows; i++)
         {
             FAPI_TRY(fapi2::getScom(target,
-                                    TRACE_SCOM_BASE + TRACE_SCOM_OFFSET + TRACE_LO_DATA_OFS,
+                                    (TRACE_SCOM_BASE +
+                                     tra_scom_offset +
+                                     TRACE_LO_DATA_OFS +
+                                     l_proc_offset),
                                     buf),
                      "Failed to read trace array low data register,"
                      " iteration %d", i);
@@ -324,13 +349,13 @@ fapi2::ReturnCode p9_sbe_tracearray(
              * so it's okay to bail out. */
             if (buf.getBit<TRACE_LO_DATA_RUNNING>())
             {
-                FAPI_ERR("Trace array is still running -- "
+                FAPI_ERR("Trace array is still running --"
                          " If you think you stopped it, maybe the controlling "
                          "debug macro is slaved to another debug macro?");
                 return fapi2::RC_PROC_GETTRACEARRAY_TRACE_RUNNING;
             }
 
-            *((uint64_t*)o_ta_data + (2 * i + 1)) = buf;
+            *(o_ta_data + (2 * i + 1)) = buf;
         }
 
         /*
@@ -341,18 +366,27 @@ fapi2::ReturnCode p9_sbe_tracearray(
         for (uint32_t i = 0; i < (P9_TRACEARRAY_NUM_ROWS - i_num_rows); i++)
         {
             FAPI_TRY(fapi2::getScom(target,
-                                    TRACE_SCOM_BASE + TRACE_SCOM_OFFSET + TRACE_LO_DATA_OFS,
+                                    (TRACE_SCOM_BASE +
+                                     tra_scom_offset +
+                                     TRACE_LO_DATA_OFS +
+                                     l_proc_offset),
                                     buf),
-                     "Failed to read trace array low data register, iteration %d", i);
+                     "Failed to read trace array low data register, "
+                     "iteration %d", i);
         }
 
         /* Then dump the high data */
         for (uint32_t i = 0; i < i_num_rows; i++)
         {
             FAPI_TRY(fapi2::getScom(target,
-                                    TRACE_SCOM_BASE + TRACE_SCOM_OFFSET + TRACE_HI_DATA_OFS, buf),
-                     "Failed to read trace array high data register, iteration %d", i);
-            *((uint64_t*)o_ta_data + (2 * i + 0)) = buf;
+                                    (TRACE_SCOM_BASE +
+                                     tra_scom_offset +
+                                     TRACE_HI_DATA_OFS +
+                                     l_proc_offset),
+                                    buf),
+                     "Failed to read trace array high data register, "
+                     "iteration %d", i);
+            *(o_ta_data + (2 * i + 0)) = buf;
         }
     }
 
@@ -360,22 +394,24 @@ fapi2::ReturnCode p9_sbe_tracearray(
      * only after all the P9_TRACEARRAY_NUM_ROWS rows are read.
      * */
     if (i_args.reset_post_dump &&
-        (!i_args.collect_dump || (i_cur_row >= P9_TRACEARRAY_NUM_ROWS)))
+        (!i_args.collect_dump ||
+         ((i_cur_row + i_num_rows) >= P9_TRACEARRAY_NUM_ROWS)))
     {
         FAPI_DBG("Resetting trace arrays");
         fapi2::buffer<uint64_t> buf;
         buf.flush<0>().setBit<DEBUG_TRACE_CONTROL_RESET>();
-        FAPI_TRY(fapi2::putScom(target, DEBUG_TRACE_CONTROL, buf),
+        FAPI_TRY(fapi2::putScom(target, DEBUG_TRACE_CONTROL + l_proc_offset, buf),
                  "Failed to reset chiplet domain trace arrays");
     }
 
     if (i_args.restart_post_dump &&
-        (!i_args.collect_dump || (i_cur_row >= P9_TRACEARRAY_NUM_ROWS)))
+        (!i_args.collect_dump ||
+         ((i_cur_row + i_num_rows) >= P9_TRACEARRAY_NUM_ROWS)))
     {
         FAPI_DBG("Starting trace arrays");
         fapi2::buffer<uint64_t> buf;
         buf.flush<0>().setBit<DEBUG_TRACE_CONTROL_START>();
-        FAPI_TRY(fapi2::putScom(target, DEBUG_TRACE_CONTROL, buf),
+        FAPI_TRY(fapi2::putScom(target, DEBUG_TRACE_CONTROL + l_proc_offset, buf),
                  "Failed to restart chiplet domain trace arrays");
     }
 
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.H
index 3cc9bb87..17a47185 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tracearray.H
@@ -43,8 +43,8 @@
 // *HWP HW Backup Owner : Joe McGill <jmcgill@us.ibm.com>
 // *HWP FW Owner        : Shakeeb Pasha<shakeebbk@in.ibm.com>
 // *HWP Team            : Perv
-// *HWP Level           : 1
-// *HWP Consumed by     : SBE
+// *HWP Level           : 2
+// *HWP Consumed by     : Conus, SBE
 //------------------------------------------------------------------------------
 
 #ifndef _P9_SBE_TRACEARRAY_H
@@ -56,8 +56,22 @@
 #include <fapi2.H>
 #include "p9_tracearray_defs.H"
 
+constexpr uint32_t P9_TRACEARRAY_FIRST_ROW  = 0;
+constexpr uint32_t MCBIST_CHIPLET_ID_START  = 0x07;
+constexpr uint32_t MCBIST_CHIPLET_ID_END    = 0x08;
+constexpr uint32_t OBUS_CHIPLET_ID_START    = 0x09;
+constexpr uint32_t OBUS_CHIPLET_ID_END      = 0x0C;
+
+#define IS_MCBIST(chipletId) \
+    ((chipletId >= MCBIST_CHIPLET_ID_START) && \
+     (chipletId <= MCBIST_CHIPLET_ID_END))
+
+#define IS_OBUS(chipletId) \
+    ((chipletId >= OBUS_CHIPLET_ID_START) && \
+     (chipletId <= OBUS_CHIPLET_ID_END))
+
 // structure to represent HWP arguments
-struct p9_sbe_tracearray_args
+struct proc_gettracearray_args
 {
     p9_tracearray_bus_id trace_bus; ///< The trace bus whose associated trace array should be dumped
     bool stop_pre_dump;             ///< Stop the trace array before starting the dump
@@ -69,14 +83,16 @@ struct p9_sbe_tracearray_args
 
 static const fapi2::TargetType P9_SBE_TRACEARRAY_TARGET_TYPES =
     fapi2::TARGET_TYPE_PROC_CHIP |
+    fapi2::TARGET_TYPE_PERV |
     fapi2::TARGET_TYPE_EX |
     fapi2::TARGET_TYPE_CORE;
 
 //function pointer typedef definition for HWP call support
 typedef fapi2::ReturnCode (*p9_sbe_tracearray_FP_t) (
     const fapi2::Target<P9_SBE_TRACEARRAY_TARGET_TYPES>& i_target,
-    const p9_sbe_tracearray_args& i_args,
-    uint8_t* o_ta_data,
+    const proc_gettracearray_args& i_args,
+    uint64_t* o_ta_data,
+    const uint32_t i_cur_row,
     const uint32_t i_num_rows
 );
 
@@ -89,16 +105,17 @@ extern "C" {
      * @return The type of target to hand to p9_sbe_tracearray to clearly
      *         identify the array instance.
      */
-    static inline fapi2::TargetType p9_sbe_tracearray_target_type(p9_tracearray_bus_id i_trace_bus)
+    static inline fapi2::TargetType p9_sbe_tracearray_target_type(
+        p9_tracearray_bus_id i_trace_bus)
     {
-        /* On SBE there is no support for MCBIST and OBUS fapi targets.
-         * But since the usage related to these targets in p9_sbe_tracearray
-         * is only for SCOMs with fully qualified adresses, PROC
-         * target is used for MCBIST and OBUS as well */
-        if (i_trace_bus <= _PROC_TB_LAST_MC_TARGET)
+        if (i_trace_bus <= _PROC_TB_LAST_PROC_TARGET)
         {
             return fapi2::TARGET_TYPE_PROC_CHIP;
         }
+        else if (i_trace_bus <= _PROC_TB_LAST_MC_TARGET)
+        {
+            return fapi2::TARGET_TYPE_PERV;
+        }
         else if (i_trace_bus <= _PROC_TB_LAST_EX_TARGET)
         {
             return fapi2::TARGET_TYPE_EX;
@@ -109,8 +126,6 @@ extern "C" {
         }
     }
 
-
-
     /* TODO via RTC:164528 - Look at optimization to improve performance
      * @brief Retrieve trace array data, based on the number of
      *        rows requested, from selected trace array via SCOM.
@@ -137,18 +152,22 @@ extern "C" {
      *             if trace array dump sequence completes successfully,
      *         RC_PROC_GETTRACEARRAY_INVALID_BUS
      *             if an invalid trace bus ID has been requested
+     *         RC_PROC_GETTRACEARRAY_INVALID_TARGET
+     *             if the supplied target type does not match the requested trace bus
      *         RC_PROC_GETTRACEARRAY_CORE_NOT_DUMPABLE
      *             if a core trace array has been requested but the chip's core
      *             is not dumpable via SCOM -> use fastarray instead
+     *         RC_PROC_GETTRACEARRAY_TRACE_RUNNING
+     *             if trace array is running when dump collection is attempted,
      *         RC_PROC_GETTRACEARRAY_TRACE_MUX_INCORRECT
      *             if the primary trace mux is not set up to trace the requested bus,
      *         else FAPI getscom/putscom return code for failing operation
      */
     fapi2::ReturnCode p9_sbe_tracearray(
         const fapi2::Target<P9_SBE_TRACEARRAY_TARGET_TYPES>& i_target,
-        const p9_sbe_tracearray_args& i_args,
+        const proc_gettracearray_args& i_args,
         uint64_t* o_ta_data,
-        const uint32_t i_cur_row = 0,
+        const uint32_t i_cur_row = P9_TRACEARRAY_FIRST_ROW,
         const uint32_t i_num_rows = P9_TRACEARRAY_NUM_ROWS
     );
 } // extern "C"