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author | Emmanuel Sacristan <esacris@us.ibm.com> | 2019-07-30 13:18:01 -0500 |
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committer | RAJA DAS <rajadas2@in.ibm.com> | 2019-08-06 20:45:33 -0500 |
commit | debfec2581112e08396e7628db93b00b0cc95898 (patch) | |
tree | ac5b1f07a282a441124c4dd520f1c28ad744e963 /src/import/chips | |
parent | 05669c55459f7e7e7e917d0a214c1f4d9354dd87 (diff) | |
download | talos-sbe-debfec2581112e08396e7628db93b00b0cc95898.tar.gz talos-sbe-debfec2581112e08396e7628db93b00b0cc95898.zip |
adding iss 768 init for p9 behaviour in nmmu
Change-Id: I41d302272200ddc37276f56e238ccab8ed768163
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/81386
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Adam S Hale <adam.samuel.hale@ibm.com>
Reviewed-by: JAKE C TRUELOVE <jtruelove@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/81401
Reviewed-by: RAJA DAS <rajadas2@in.ibm.com>
Diffstat (limited to 'src/import/chips')
-rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index a494fb6f..35589d12 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -3164,6 +3164,23 @@ </chip> </chipEcFeature> </attribute> + <!-- ********************************************************************* --> +<attribute> + <id>ATTR_CHIP_EC_FEATURE_NMMU_AX1_ISS768_FIX_DIS</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + NMMU disables seg fault generation for radix access to DR=1, HV=1 with lpid !=0. + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_AXONE</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> <!-- ******************************************************************** --> <attribute> <id>ATTR_CHIP_EC_FEATURE_NMMU_PWC_DIS_DD2</id> |