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| author | Joachim Fenkes <fenkes@de.ibm.com> | 2017-06-19 19:27:55 -0500 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-06-23 19:51:36 -0400 |
| commit | c88eeed15dd804d3a133fb6d1bb883e6629b866a (patch) | |
| tree | 9e08c62cdc6d599683fa39805989a059947bb6da /src/import/chips | |
| parent | 526448a776b2ba44736baf370bce3575fc72d2a8 (diff) | |
| download | talos-sbe-c88eeed15dd804d3a133fb6d1bb883e6629b866a.tar.gz talos-sbe-c88eeed15dd804d3a133fb6d1bb883e6629b866a.zip | |
p9_tp_stopclocks: Don't raise CFAM FENCE2 to keep PERV chiplet accessible
Change-Id: I402c713589d2538ec20da02f6f21d5a6aadc45f3
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42094
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42095
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.C | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.C b/src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.C index b54c0eb1..f9682bc6 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_tp_stopclocks.C @@ -157,7 +157,7 @@ fapi2::ReturnCode p9_tp_stopclocks(const fapi2::Target<fapi2::TARGET_TYPE_PROC_C //CFAM.ROOT_CTRL0.FENCE[0..6]_DC = 1 l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_FENCE0_DC>(); l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_FENCE1_DC>(); - l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_FENCE2_DC>(); + // Not raising PERV_ROOT_CTRL0_FENCE2_DC because we need FSI2PIB <- PERV EPS connectivity l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_FENCE3_DC>(); l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_FENCE4_DC>(); l_data32_root_ctrl0.setBit<PERV_ROOT_CTRL0_FENCE5_DC>(); |
