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| author | Joe McGill <jmcgill@us.ibm.com> | 2017-01-20 18:27:15 -0600 |
|---|---|---|
| committer | spashabk-in <shakeebbk@in.ibm.com> | 2017-09-12 00:12:52 -0500 |
| commit | 9dc8b5aa9b5f9f159a0b1dd460af3f7670b270dd (patch) | |
| tree | 0ecfd18895e64652362a0d67d983d4b029c8bb27 /src/import/chips | |
| parent | 32f92e421bb8dda0c01c539eaec4c05ff46b23a5 (diff) | |
| download | talos-sbe-9dc8b5aa9b5f9f159a0b1dd460af3f7670b270dd.tar.gz talos-sbe-9dc8b5aa9b5f9f159a0b1dd460af3f7670b270dd.zip | |
p9_sbe_tp_chiplet_init3 -- disable TP TOD hang pulse
Change-Id: I11c9c68ed140ab8593a1a6eee54c9dd3ee2464d3
Original-Change-Id: I838703170232b7ad39ae752f0fcde996f5bd577e
CQ: HW401184
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35199
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Diffstat (limited to 'src/import/chips')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index b0a88471..b484c15b 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -1867,6 +1867,23 @@ </chip> </chipEcFeature> </attribute> + <!-- ******************************************************************** --> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_HW401184</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Nimbus DD1: Silent Baron: TB and DEC SPRs stray apart with TOD enabled + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x20</value> + <test>LESS_THAN</test> + </ec> + </chip> + </chipEcFeature> + </attribute> <!-- ******************************************************************** --> <!-- Memory Section --> |
