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author | Nick Klazynski <jklazyns@us.ibm.com> | 2018-01-18 17:38:07 -0600 |
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committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2018-01-23 05:29:50 -0500 |
commit | 60bbd1a8b644665590dcbe5b79c0ac7e0ece9f9a (patch) | |
tree | 8437156ca1bebc2964bf8036278209b127d6230e /src/import/chips | |
parent | 1186568fa81d149bda1bbdf1a2ff5f383b4b1908 (diff) | |
download | talos-sbe-60bbd1a8b644665590dcbe5b79c0ac7e0ece9f9a.tar.gz talos-sbe-60bbd1a8b644665590dcbe5b79c0ac7e0ece9f9a.zip |
Implement security IMCs, based on v29 of wiki
/wiki/W9f19463eb4a5_44ca_ad0c_a35ccf4e7d1e/page/IMCs%20by%20Project
Change-Id: Ib6b7ec4daf84bf9125bc68a4a4f287175a385b07
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52206
Dev-Ready: James N Klazynski <jklazyns@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52214
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips')
-rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 155 |
1 files changed, 149 insertions, 6 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index d7f53455..53971331 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -58,23 +58,33 @@ </attribute> <!-- ********************************************************************* --> <attribute> - <id>ATTR_CHIP_EC_FEATURE_HW430733</id> + <id>ATTR_CHIP_EC_FEATURE_FORCE_PRIV_L1D</id> <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType> <description> - Nimbus DD2.2 / Cumulus DD1.1 - Serialize bcctr[l] + Force Private L1D </description> <chipEcFeature> <chip> <name>ENUM_ATTR_NAME_NIMBUS</name> <ec> <value>0x22</value> - <test>EQUAL</test> + <test>LESS_THAN_OR_EQUAL</test> </ec> </chip> + </chipEcFeature> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_HW430733</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Nimbus DD2.2 - MTTRIG2 setup to flush L1D + </description> + <chipEcFeature> <chip> - <name>ENUM_ATTR_NAME_CUMULUS</name> + <name>ENUM_ATTR_NAME_NIMBUS</name> <ec> - <value>0x11</value> + <value>0x22</value> <test>EQUAL</test> </ec> </chip> @@ -167,10 +177,58 @@ </attribute> <!-- ********************************************************************* --> <attribute> + <id>ATTR_CHIP_EC_FEATURE_HW433038</id> + <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType> + <description> + HW433038 - LSU clockgating bug + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x22</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + <chip> + <name>ENUM_ATTR_NAME_CUMULUS</name> + <ec> + <value>0x11</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ********************************************************************* --> + <attribute> <id>ATTR_CHIP_EC_FEATURE_NEW_TM_MODE</id> + <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType> + <description> + Enable new TM handling for NDD2.2+ and CDD1.1+ + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x22</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + <chip> + <name>ENUM_ATTR_NAME_CUMULUS</name> + <ec> + <value>0x11</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_HW426420</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> - Enable new TM handling for NDD2.2 + Additional workaround needed for TM - NDD2.2 only </description> <chipEcFeature> <chip> @@ -3745,6 +3803,23 @@ </attribute> <!-- ********************************************************************* --> <attribute> + <id>ATTR_CHIP_EC_FEATURE_SERIALIZE_INDIRECT_BRANCHES_TA</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Serialize indirect branches in TA=1 + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_CUMULUS</name> + <ec> + <value>0x11</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ********************************************************************* --> + <attribute> <id>ATTR_CHIP_EC_FEATURE_HW417630</id> <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType> <description> @@ -3841,6 +3916,74 @@ </attribute> <!-- ******************************************************************** --> <attribute> + <id>ATTR_CHIP_EC_FEATURE_SERIALIZE_INDIRECT_BRANCHES_RL</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Serialize indirect branches using risklevel + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x22</value> + <test>EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ******************************************************************** --> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_SERIALIZE_INDIRECT_BRANCHES</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Serialize indirect branches + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x21</value> + <test>LESS_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ******************************************************************** --> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_SERIALIZE_LTPTR</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Serialize LTPTR + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_CUMULUS</name> + <ec> + <value>0x11</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ******************************************************************** --> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_IBMI_SEC</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Enable IBMi-specific security enhancements + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x22</value> + <test>EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ******************************************************************** --> + <attribute> <id>ATTR_CHIP_EC_FEATURE_HW415883</id> <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType> <description> |