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author | Thi Tran <thi@us.ibm.com> | 2018-03-15 16:33:39 -0500 |
---|---|---|
committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2018-03-28 21:02:03 -0400 |
commit | 0c497af5150bbc6b961e847cf18f261679f52031 (patch) | |
tree | 56e9c9e6d9a576a79edb1b45fed31b0876c0234a /src/import/chips | |
parent | d2cdf116e9ba6f168312be677360f31c2c9e27ba (diff) | |
download | talos-sbe-0c497af5150bbc6b961e847cf18f261679f52031.tar.gz talos-sbe-0c497af5150bbc6b961e847cf18f261679f52031.zip |
Do not apply HW414958 to Axone
Change-Id: I6fcbc5f49fdce481c9525220bc69ad9c4e1ecf1b
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55945
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56014
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips')
-rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 31 |
1 files changed, 28 insertions, 3 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index 5f6b86c6..880f0776 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -2891,7 +2891,7 @@ <id>ATTR_CHIP_EC_FEATURE_HW426891</id> <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP</targetType> <description> - HW426891 for INT initfile on Coral, Cumulus, and Axone systems for + HW426891 for INT initfile on Coral, Cumulus, and Axone systems for ship mode </description> <chipEcFeature> @@ -3080,7 +3080,7 @@ <id>ATTR_CHIP_EC_FEATURE_DISABLE_64B_STORE</id>> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> - Nimbus DD1 only: don't set 64B store, dials didn't exist + Nimbus DD1 only: don't set 64B store, dials didn't exist </description> <chipEcFeature> <chip> @@ -3097,7 +3097,7 @@ <id>ATTR_CHIP_EC_FEATURE_DISABLE_TLBIE_PACING</id>> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> - Nimbus DD1 only: don't set tlbie pacing, dials didn't exist + Nimbus DD1 only: don't set tlbie pacing, dials didn't exist </description> <chipEcFeature> <chip> @@ -7177,4 +7177,29 @@ </chipEcFeature> </attribute> <!-- ******************************************************************** --> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_HW414958</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Disabling speculative dcbf* ttypes. + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + <chip> + <name>ENUM_ATTR_NAME_CUMULUS</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ******************************************************************** --> + </attributes> |