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author | Joe McGill <jmcgill@us.ibm.com> | 2018-04-27 12:48:17 -0500 |
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committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2018-05-17 21:14:41 -0400 |
commit | d29d12f39592b8d7a8c6eb908a84680a788fbee3 (patch) | |
tree | eaf2633a5cb8cf4f5119d5aeaf228863e0dcb5c5 /src/import/chips/p9 | |
parent | 2ed31c121975740fba0b4bd11e0562f6cdf4795b (diff) | |
download | talos-sbe-d29d12f39592b8d7a8c6eb908a84680a788fbee3.tar.gz talos-sbe-d29d12f39592b8d7a8c6eb908a84680a788fbee3.zip |
enable spreading via SS PLL for Fleetwood platform
pervasive_attribues.xml:
Create new platinit attribute -- ATTR_MRW_FILTER_PLL_BUCKET
System specific value for Filter PLL bucket selector (init=0), set by MRW
- if non-zero, this value will directly set ATTR_FILTER_PLL_BUCKET,
which is used by SBE to select the override to apply
- if zero, MVPD MK keyword will set ATTR_FILTER_PLL_BUCKET
p9.filter.pll.override.scan.initfile:
Repurpose overrides built for Cumulus, to produce 0.2% down spread
Nimbus overrides still enable control of BGoffset
p9_xip_customize.C:
Consume ATTR_MRW_FILTER_PLL_BUCKET and use logic above to
set ATTR_FILTER_PLL_BUCKET
Change-Id: I2ea799179632d36251027a1d4468c6c89bfa6e00
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57988
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58003
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9')
3 files changed, 34 insertions, 4 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.C index ed1b4ff3..e65bba3c 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_initf.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER sbe Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2017 */ +/* Contributors Listed Below - COPYRIGHT 2015,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -128,8 +128,7 @@ fapi2::ReturnCode p9_sbe_npll_initf( "Unsupported Filter PLL bucket value!"); } - // re-scan PLL ring to apply overlay containing filter PLL BGoffset - // selected from MVPD + // re-scan PLL ring to apply selected filter PLL overlay FAPI_DBG("Re-scan perv_pll_bndy to apply perv_pll_bndy_flt_%d ring", l_fpll_bucket); FAPI_TRY(fapi2::putRing(i_target_chip, diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index 8bf28a2f..b7080415 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -7449,4 +7449,21 @@ </chipEcFeature> </attribute> <!-- ******************************************************************** --> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_SS_FPLL_SPREAD</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Generate 0.2% down spread in SS Filter PLL + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_CUMULUS</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ******************************************************************** --> </attributes> diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml index 9486f295..f1264e1b 100755 --- a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml @@ -143,7 +143,7 @@ <attribute> <id>ATTR_FILTER_PLL_BUCKET</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description>Select Filter PLL BGoffset programming</description> + <description>Select Filter PLL bucket</description> <valueType>uint8</valueType> <persistRuntime/> <writeable/> @@ -151,6 +151,20 @@ </attribute> <attribute> + <id>ATTR_MRW_FILTER_PLL_BUCKET</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description> + System specific value for Filter PLL bucket, provided by MRW. + If non-zero, this value will directly set ATTR_FILTER_PLL_BUCKET (used by SBE to select bucket). + If zero, VPD MK content will set ATTR_FILTER_PLL_BUCKET. + </description> + <valueType>uint8</valueType> + <persistRuntime/> + <platInit/> + <initToZero/> +</attribute> + +<attribute> <id>ATTR_OB0_PLL_BUCKET</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description>Select OBUS0 pll setting from one of the supported frequencies</description> |