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author | Nick Bofferding <bofferdn@us.ibm.com> | 2018-01-18 23:21:15 -0600 |
---|---|---|
committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2018-01-22 20:14:16 -0500 |
commit | 972609cc9fcb49c800ec4023bd3414cb7fa37932 (patch) | |
tree | d9c286002236bd80a83df26df6107e84a32b907e /src/import/chips/p9 | |
parent | 385957bda4226151ebf2f6dab0def0023e753214 (diff) | |
download | talos-sbe-972609cc9fcb49c800ec4023bd3414cb7fa37932.tar.gz talos-sbe-972609cc9fcb49c800ec4023bd3414cb7fa37932.zip |
Secure Boot: Add p9_setup_dpll_values scom registers to whitelist
Change-Id: I7a2bc6abf4a2bad1ed6c18147bab67f30f6574f4
Backport: release-fips910
CQ: SW413942
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52221
Reviewed-by: SANTOSH BALASUBRAMANIAN <sbalasub@in.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52225
Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9')
-rw-r--r-- | src/import/chips/p9/security/p9_security_white_black_list.csv | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/import/chips/p9/security/p9_security_white_black_list.csv b/src/import/chips/p9/security/p9_security_white_black_list.csv index 0e534005..5ff5f56d 100644 --- a/src/import/chips/p9/security/p9_security_white_black_list.csv +++ b/src/import/chips/p9/security/p9_security_white_black_list.csv @@ -905,4 +905,5 @@ Version,Chiplet,Base Address,Chiplet Id - range,User,Register Name,Description/U ,TP,0x0006C733,0x00,HB,AVSBus O2SCTRL1 Bus 1 Bridge B,p9_setup_evid.C,write_whitelist, ,TP,0x0006C737,0x00,HB,AVSBus O2SCMD Bus 1 Bridge B,p9_setup_evid.C,write_whitelist, ,TP,0x0006C738,0x00,HB,AVSBus O2SWD Bus 1 Bridge B,p9_setup_evid.C,write_whitelist, - +,CACHE,0x100F0151,0x10-0x16,HBFW,QPPM DPLL Frequency Control Register,p9_setup_evid.C,write_whitelist, +,CACHE,0x100F01B6,0x10-0x16,HBFW,QPPM VDM Config Register,p9_setup_evid.C,write_whitelist, |