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author | Brian Silver <bsilver@us.ibm.com> | 2016-09-18 13:25:33 -0500 |
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committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2018-12-17 21:06:18 -0600 |
commit | 5857fe5e93418a01e3e112a55d720d91b987d312 (patch) | |
tree | c9b4d48bf76f942dca19cdfbda83da673b6b45de /src/import/chips/p9 | |
parent | 2318bae2ec82e1f3ead7ba9db958d4dca86a1496 (diff) | |
download | talos-sbe-5857fe5e93418a01e3e112a55d720d91b987d312.tar.gz talos-sbe-5857fe5e93418a01e3e112a55d720d91b987d312.zip |
Change p9_mss_freq_system to write attributes, errors for Cronus
Honor the maximum support frequencies based on rank configs
Remove the MEMVPD_FREQ attribute
Fixup VPD tooling and accessors for new freq attrs
Fix test case handling of master ranks
Fix handling of empty MCS in Cronus
Change-Id: Ibbd42b130eb2d13bb9025a30c37bcd85445e7218
Original-Change-Id: I669ad0e81454f12368b484e826461ee76f7b9079
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29878
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69784
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Tested-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9')
-rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml index 5d7921fb..286700fb 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml @@ -2119,22 +2119,6 @@ </attribute> <attribute> - <id>ATTR_MSS_NEST_CAPABLE_FREQUENCIES</id> - <targetType>TARGET_TYPE_MCBIST</targetType> - <description> - The NEST frequencies the memory chip can run at computed by the mss_freq. - The possibilities are ORed together. The platform uses these value and - the MRW to determine what frequency to boot the fabric (nest) if it can. - There are two values: 8G and 9.6G - </description> - <initToZero></initToZero> - <valueType>uint64</valueType> - <enum>8_0G = 1, 9_6G = 2</enum> - <writeable/> - <mssAccessorName>nest_capable_frequencies</mssAccessorName> - </attribute> - - <attribute> <id>ATTR_MSS_VOLT_OVERRIDE</id> <targetType>TARGET_TYPE_MCBIST</targetType> <description> |