Updates to permit synchronized SS PLL spreading via TOD

Create EC feature attribute and user override attribute to control application
of synchronized spreading.  Default to enable synchronized spreading on
Axone only.

p9_sbe_npll_setup
  Conditionally skip existing unsynchronized spread enablement

p9_tod_init
  Conditionally invoke spread sync routine after TOD network is running

p9_ss_pll_sync
  Remove from repository, shift code into p9_tod_init to prevent
  need for mirroring into downstream repositories for FW consumption

Change-Id: Ic32c800d58c260136b45fe9561989987d0a97ceb
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63494
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63503
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>

4 files changed, 76 insertions, 14 deletions

diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C
index 267d2883..2e19c7aa 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C
@@ -117,22 +117,9 @@ fapi2::ReturnCode p9_sbe_npll_setup(const
                     .set_MASTER_CHIP(i_target_chip)
                     .set_SS_PLL_READ(l_read_reg)
                     .set_AFTER_SPREAD_ENABLE(false),
-                    "ERROR:SS PLL LOCK NOT SET BEFORE ENABLING SPREAD SPECTRUM");
+                    "ERROR:SS PLL LOCK NOT SET");
 
         FAPI_TRY(enable_spread_spectrum_via_tod(i_target_chip));
-        fapi2::delay(NS_DELAY, SIM_CYCLE_DELAY);
-
-        FAPI_DBG("check SS PLL lock again after enabling spread spectrum");
-        //Getting PLL_LOCK_REG register value
-        FAPI_TRY(fapi2::getScom(i_target_chip, PERV_TP_PLL_LOCK_REG,
-                                l_read_reg)); //l_read_reg = PERV.PLL_LOCK_REG
-
-        FAPI_ASSERT(l_read_reg.getBit<0>(),
-                    fapi2::SS_PLL_LOCK_ERR()
-                    .set_MASTER_CHIP(i_target_chip)
-                    .set_SS_PLL_READ(l_read_reg)
-                    .set_AFTER_SPREAD_ENABLE(true),
-                    "ERROR:SS PLL LOCK NOT SET AFTER ENABLING SPREAD SPECTRUM");
 
         FAPI_DBG("Release SS PLL Bypass");
         //Setting ROOT_CTRL8 register value
@@ -360,6 +347,27 @@ static fapi2::ReturnCode enable_spread_spectrum_via_tod(
     const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip)
 {
     fapi2::buffer<uint64_t> l_data;
+    uint8_t l_sync_spread = 0;
+
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FORCE_SYNC_SS_PLL_SPREAD,
+                           fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(),
+                           l_sync_spread),
+             "Error from FAPI_ATTR_GET (ATTR_FORCE_SYNC_SS_PLL_SPREAD)");
+
+    if (l_sync_spread)
+    {
+        goto fapi_try_exit;
+    }
+
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_SYNC_SS_PLL_SPREAD,
+                           i_target_chip,
+                           l_sync_spread),
+             "Error from FAPI_ATTR_GET (ATTR_CHIP_EC_FEATURE_SYNC_SS_PLL_SPREAD)");
+
+    if (l_sync_spread)
+    {
+        goto fapi_try_exit;
+    }
 
     FAPI_DBG("Enable Spread Spectrum via TOD");
 
@@ -385,6 +393,21 @@ static fapi2::ReturnCode enable_spread_spectrum_via_tod(
                        .set_TOD_TIMER_REG(l_data),
                        "Spread Spectrum enable signal not set");
 
+    fapi2::delay(NS_DELAY, SIM_CYCLE_DELAY);
+
+    FAPI_DBG("check SS PLL lock again after enabling spread spectrum");
+    //Getting PLL_LOCK_REG register value
+    FAPI_TRY(fapi2::getScom(i_target_chip,
+                            PERV_TP_PLL_LOCK_REG,
+                            l_data));
+
+    FAPI_ASSERT(l_data.getBit<0>(),
+                fapi2::SS_PLL_LOCK_ERR()
+                .set_MASTER_CHIP(i_target_chip)
+                .set_SS_PLL_READ(l_data)
+                .set_AFTER_SPREAD_ENABLE(true),
+                "ERROR:SS PLL LOCK NOT SET AFTER ENABLING SPREAD SPECTRUM");
+
 fapi_try_exit:
     return fapi2::current_err;
 }
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
index 95cf7b08..77b0979f 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
@@ -7741,4 +7741,21 @@
     </chipEcFeature>
   </attribute>
   <!-- ******************************************************************** -->
+  <attribute>
+    <id>ATTR_CHIP_EC_FEATURE_SYNC_SS_PLL_SPREAD</id>
+    <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+    <description>
+     Use TOD to synchronize SS filter PLL spreading across system
+    </description>
+    <chipEcFeature>
+      <chip>
+        <name>ENUM_ATTR_NAME_AXONE</name>
+        <ec>
+          <value>0x10</value>
+          <test>GREATER_THAN_OR_EQUAL</test>
+        </ec>
+      </chip>
+    </chipEcFeature>
+  </attribute>
+  <!-- ******************************************************************** -->
 </attributes>
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml
index ee4a676b..64d77a1e 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml
@@ -597,6 +597,14 @@ attribute tank
           <name>ATTR_PROC_MEM_TO_USE</name>
           <value>0x00</value>
   </entry>
+  <entry>
+          <name>ATTR_FORCE_SYNC_SS_PLL_SPREAD</name>
+          <value>0x00</value>
+  </entry>
+  <entry>
+          <name>ATTR_CHIP_EC_FEATURE_SYNC_SS_PLL_SPREAD</name>
+          <virtual/>
+  </entry>
   <!-- See system_attributes.xml for a description of ATTR_EXECUTION_PLATFORM -->
   <entry>
            <name>ATTR_EXECUTION_PLATFORM</name>
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml
index 515facbb..12028234 100755
--- a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml
@@ -165,6 +165,20 @@
 </attribute>
 
 <attribute>
+  <id>ATTR_FORCE_SYNC_SS_PLL_SPREAD</id>
+  <targetType>TARGET_TYPE_SYSTEM</targetType>
+  <description>
+    Use TOD to synchronize SS filter PLL spreading across system,
+    overriding ATTR_CHIP_EC_FEATURE_SYNC_SS_PLL_SPREAD
+  </description>
+  <valueType>uint8</valueType>
+  <persistRuntime/>
+  <platInit/>
+  <initToZero/>
+  <overrideOnly/>
+</attribute>
+
+<attribute>
   <id>ATTR_OB0_PLL_BUCKET</id>
   <targetType>TARGET_TYPE_PROC_CHIP</targetType>
   <description>Select OBUS0 pll setting from one of the supported frequencies</description>