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author | Shelton Leung <sleung@us.ibm.com> | 2016-11-17 10:45:03 -0600 |
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committer | spashabk-in <shakeebbk@in.ibm.com> | 2017-09-12 00:12:21 -0500 |
commit | 6f0f203057e988056db39f3b4d9d8ef16b3e2403 (patch) | |
tree | 814e28cc90f243eea70a382735f1082261d55b9d /src/import/chips/p9/procedures | |
parent | 7372030038e911f6131006b2831d44d81fec1525 (diff) | |
download | talos-sbe-6f0f203057e988056db39f3b4d9d8ef16b3e2403.tar.gz talos-sbe-6f0f203057e988056db39f3b4d9d8ef16b3e2403.zip |
scan inits for lab workaround for DI bug HW392781
Change-Id: Id963b7e3d836a7be9758201465759b2cd53ec94c
Original-Change-Id: Ia71c4d0933112c6804774b76a08ec5fbbe254833
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32780
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures')
-rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index 06b312ed..50b06e3d 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -429,6 +429,23 @@ </chipEcFeature> </attribute> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_MSS_HW392781_RDARRAY_CLKGATE</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Data integrity issue requires us to disable clockgate in read array for Nimbus DD1.0 + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x20</value> + <test>LESS_THAN</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ******************************************************************** --> <!-- End Memory Section --> <!-- ******************************************************************** --> |