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authorSachin Gupta <sgupta2m@in.ibm.com>2018-01-29 09:45:03 -0600
committerSachin Gupta <sgupta2m@in.ibm.com>2018-02-10 09:27:36 -0500
commit25624c1917a9cc8ab16c7caa6d2fee5590896285 (patch)
tree3c77a35266331bf290c09e6c4485bb28a7196857 /src/import/chips/p9/procedures
parent2d94bed48071cf5b1326d2a417ad3b9fb23c857f (diff)
downloadtalos-sbe-25624c1917a9cc8ab16c7caa6d2fee5590896285.tar.gz
talos-sbe-25624c1917a9cc8ab16c7caa6d2fee5590896285.zip
Revert "p9_sbe_npll_setup: Enable Spread Spectrum right after SS PLL lock""
This reverts commit 59635779caa45afd1be7e483d232bb317b6c0989. Change-Id: I93708f97e5a5c44e9af1957230bb68a754e98ebb Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52838 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53499 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures')
-rw-r--r--src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C67
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_setup_errors.xml35
2 files changed, 97 insertions, 5 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C
index 5a6b52bd..267d2883 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_npll_setup.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER sbe Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2017 */
+/* Contributors Listed Below - COPYRIGHT 2015,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -54,6 +54,9 @@ enum P9_SBE_NPLL_SETUP_Private_Constants
static fapi2::ReturnCode p9_sbe_npll_setup_sectorbuffer_pulsemode_settings(
const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip);
+static fapi2::ReturnCode enable_spread_spectrum_via_tod(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip);
+
fapi2::ReturnCode p9_sbe_npll_setup(const
fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip)
{
@@ -112,8 +115,24 @@ fapi2::ReturnCode p9_sbe_npll_setup(const
FAPI_ASSERT(l_read_reg.getBit<0>(),
fapi2::SS_PLL_LOCK_ERR()
.set_MASTER_CHIP(i_target_chip)
- .set_SS_PLL_READ(l_read_reg),
- "ERROR:SS PLL LOCK NOT SET");
+ .set_SS_PLL_READ(l_read_reg)
+ .set_AFTER_SPREAD_ENABLE(false),
+ "ERROR:SS PLL LOCK NOT SET BEFORE ENABLING SPREAD SPECTRUM");
+
+ FAPI_TRY(enable_spread_spectrum_via_tod(i_target_chip));
+ fapi2::delay(NS_DELAY, SIM_CYCLE_DELAY);
+
+ FAPI_DBG("check SS PLL lock again after enabling spread spectrum");
+ //Getting PLL_LOCK_REG register value
+ FAPI_TRY(fapi2::getScom(i_target_chip, PERV_TP_PLL_LOCK_REG,
+ l_read_reg)); //l_read_reg = PERV.PLL_LOCK_REG
+
+ FAPI_ASSERT(l_read_reg.getBit<0>(),
+ fapi2::SS_PLL_LOCK_ERR()
+ .set_MASTER_CHIP(i_target_chip)
+ .set_SS_PLL_READ(l_read_reg)
+ .set_AFTER_SPREAD_ENABLE(true),
+ "ERROR:SS PLL LOCK NOT SET AFTER ENABLING SPREAD SPECTRUM");
FAPI_DBG("Release SS PLL Bypass");
//Setting ROOT_CTRL8 register value
@@ -327,3 +346,45 @@ static fapi2::ReturnCode p9_sbe_npll_setup_sectorbuffer_pulsemode_settings(
fapi_try_exit:
return fapi2::current_err;
}
+
+/// @brief Enable the TOD's spread spectrum enable output
+///
+/// Set the TOD timer to a nonzero value to arm it and briefly start the
+/// TOD so that is passes the set timer value. The TOD will stop in ERROR
+/// state due to missing SYNC pulses but we don't care about that and
+/// clear out the error afterwards. The spread spectrum enable will stay set.
+///
+/// @param[in] i_target_chip Reference to TARGET_TYPE_PROC_CHIP target
+/// @return FAPI2_RC_SUCCESS if success, else error code.
+static fapi2::ReturnCode enable_spread_spectrum_via_tod(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip)
+{
+ fapi2::buffer<uint64_t> l_data;
+
+ FAPI_DBG("Enable Spread Spectrum via TOD");
+
+ // Set up the TOD timer unit to trigger on a TOD value of one
+ l_data.flush<0>().insertFromRight<PERV_TOD_TIMER_REG_VALUE, PERV_TOD_TIMER_REG_VALUE_LEN>(1ULL);
+ FAPI_TRY(fapi2::putScom(i_target_chip, PERV_TOD_TIMER_REG, l_data));
+
+ // Reset the TOD and set it to a value of one to trigger the timer
+ l_data.flush<0>().setBit<PERV_TOD_LOAD_TOD_MOD_REG_FSM_TRIGGER>();
+ FAPI_TRY(fapi2::putScom(i_target_chip, PERV_TOD_LOAD_TOD_MOD_REG, l_data));
+ l_data.flush<0>()
+ .insertFromRight<PERV_TOD_LOAD_TOD_REG_VALUE, PERV_TOD_LOAD_TOD_REG_VALUE_LEN>(1ULL)
+ .setBit<63>();
+ FAPI_TRY(fapi2::putScom(i_target_chip, PERV_TOD_LOAD_TOD_REG, l_data));
+
+ // Check that the TOD timer turned its SSCGEN output on
+ FAPI_TRY(fapi2::getScom(i_target_chip, PERV_TOD_TIMER_REG, l_data));
+
+ // If the Assertion fails, don't exit; we can keep trucking without Spread Spectrum
+ FAPI_ASSERT_NOEXIT(l_data.getBit<PERV_TOD_TIMER_REG_STATUS>(),
+ fapi2::SPREAD_SPECTRUM_ENABLE_ERR()
+ .set_MASTER_CHIP(i_target_chip)
+ .set_TOD_TIMER_REG(l_data),
+ "Spread Spectrum enable signal not set");
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_setup_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_setup_errors.xml
index bb135458..cbfa7839 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_setup_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_npll_setup_errors.xml
@@ -5,7 +5,7 @@
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
-<!-- Contributors Listed Below - COPYRIGHT 2015,2017 -->
+<!-- Contributors Listed Below - COPYRIGHT 2015,2018 -->
<!-- [+] International Business Machines Corp. -->
<!-- -->
<!-- -->
@@ -32,7 +32,7 @@
<hwpError>
<sbeError/>
<rc>RC_SS_PLL_LOCK_ERR</rc>
- <description>Spectrum pll not locked</description>
+ <description>Spread Spectrum pll not locked</description>
<collectRegisterFfdc>
<id>ROOT_CTRL_REGISTERS</id>
<target>MASTER_CHIP</target>
@@ -44,6 +44,7 @@
<targetType>TARGET_TYPE_PROC_CHIP</targetType>
</collectRegisterFfdc>
<ffdc>SS_PLL_READ</ffdc>
+ <ffdc>AFTER_SPREAD_ENABLE</ffdc>
<callout>
<target>MASTER_CHIP</target>
<priority>HIGH</priority>
@@ -156,4 +157,34 @@
</gard>
</hwpError>
<!-- ******************************************************************** -->
+ <hwpError>
+ <sbeError/>
+ <rc>RC_SPREAD_SPECTRUM_ENABLE_ERR</rc>
+ <description>Failed to enable Spread Spectrum</description>
+ <collectRegisterFfdc>
+ <id>ROOT_CTRL_REGISTERS</id>
+ <target>MASTER_CHIP</target>
+ <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+ </collectRegisterFfdc>
+ <collectRegisterFfdc>
+ <id>PERV_CTRL_REGISTERS</id>
+ <target>MASTER_CHIP</target>
+ <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+ </collectRegisterFfdc>
+ <collectRegisterFfdc>
+ <id>REG_FFDC_TOD_STATUS</id>
+ <target>MASTER_CHIP</target>
+ <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+ </collectRegisterFfdc>
+ <ffdc>TOD_TIMER_REG</ffdc>
+ <callout>
+ <procedure>CODE</procedure>
+ <priority>HIGH</priority>
+ </callout>
+ <callout>
+ <target>MASTER_CHIP</target>
+ <priority>MEDIUM</priority>
+ </callout>
+ <!-- No deconfig or gard as we can keep running without Spread Spectrum as long as the PLL doesn't unlock -->
+ </hwpError>
</hwpErrors>
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