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authorJoe McGill <jmcgill@us.ibm.com>2018-07-11 09:14:59 -0500
committerSachin Gupta <sgupta2m@in.ibm.com>2018-07-12 01:40:34 -0400
commit8dcb329eeac4b06b711c637ed589d05ed8c0861c (patch)
treec2bb0129fe49918bc7283a638d7f8aa436735fb0 /src/import/chips/p9/procedures/xml
parentb725244e84ae48c9d0e50c91eaddcd9cdf29462e (diff)
downloadtalos-sbe-8dcb329eeac4b06b711c637ed589d05ed8c0861c.tar.gz
talos-sbe-8dcb329eeac4b06b711c637ed589d05ed8c0861c.zip
p9_sbe_check_quiesce -- restore call to p9_int_scrub_caches
52512 removed code related to the DD1 SW based INT reset sequence, to leave only the HW based reset in production code for DD2 and beyond. It also erroneously removed the call to/code for p9_int_scrub_caches. This commit restores the subroutine, and invokes it prior to the HW quiesce/sync reset into order to scrub/flush the EQC, VPC, IVC, and SBC caches. Change-Id: I051117e3a18c55aea7267e53eea1652f0cff9790 CQ: SW431898 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/62227 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/62243 Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml')
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_sbe_check_quiesce_errors.xml6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_check_quiesce_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_check_quiesce_errors.xml
index a7590fe2..1b2d2e0e 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_check_quiesce_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_check_quiesce_errors.xml
@@ -5,7 +5,7 @@
<!-- -->
<!-- OpenPOWER sbe Project -->
<!-- -->
-<!-- Contributors Listed Below - COPYRIGHT 2016,2017 -->
+<!-- Contributors Listed Below - COPYRIGHT 2016,2018 -->
<!-- [+] International Business Machines Corp. -->
<!-- -->
<!-- -->
@@ -177,10 +177,10 @@
<!-- ******************************************************************** -->
<hwpError>
<sbeError/>
- <rc>RC_P9_INT_WORKAROUND_ERR</rc>
+ <rc>RC_P9_INT_SCRUB_NOT_FINISHED_ERR</rc>
<description>
Procedure: p9_sbe_check_quiesce
- If we hit an error in the INT unit workaround for DD1 part
+ Cache scrub operation did not finish within programmed wait period
</description>
<ffdc>TARGET</ffdc>
<ffdc>ADDRESS</ffdc>
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