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| author | Jacob Harvey <jlharvey@us.ibm.com> | 2016-08-31 13:55:41 -0500 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2018-12-17 21:07:30 -0600 |
| commit | e08919954f758e4dc2c69cd6c96ce0a4518ae659 (patch) | |
| tree | 0e41c26dbe56750d0b0bac12062b29de83e079e8 /src/import/chips/p9/procedures/xml/attribute_info | |
| parent | f3df43fa56d11b4452b63c7aa4e8a00c381ceb2f (diff) | |
| download | talos-sbe-e08919954f758e4dc2c69cd6c96ce0a4518ae659.tar.gz talos-sbe-e08919954f758e4dc2c69cd6c96ce0a4518ae659.zip | |
Implement L2 eff_config_thermal, bulk_pwr_throttle
Implemented p9_mss_bulk_pwr_throttles
p9_mss_utils_to_throttles
p9_mss_eff_config_thermal
Updated throttle xml
Change-Id: I0492f9fe8a5bd027ff5875f236711bcf55af88f5
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31804
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69788
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Tested-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/attribute_info')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml | 23 |
1 files changed, 19 insertions, 4 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml index 1281d819..53c7dcef 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml @@ -1182,7 +1182,7 @@ of M DRAM clocks setting for cfg_nm_n_per_port. </description> <initToZero></initToZero> - <valueType>uint32</valueType> + <valueType>uint16</valueType> <writeable/> <array>2</array> <mssAccessorName>mem_throttled_n_commands_per_port</mssAccessorName> @@ -1209,7 +1209,7 @@ <targetType>TARGET_TYPE_MCS</targetType> <description>This is the throttle numerator setting for cfg_nm_n_per_slot</description> <initToZero></initToZero> - <valueType>uint32</valueType> + <valueType>uint16</valueType> <writeable/> <array>2</array> <mssAccessorName>mem_throttled_n_commands_per_slot</mssAccessorName> @@ -1346,6 +1346,21 @@ </attribute> <attribute> + <id>ATTR_MSS_DIMM_THERMAL_LIMIT</id> + <targetType>TARGET_TYPE_MCS</targetType> + <description> + DIMM Max Power based on a thermal limit + Decoded from ATTR_MSS_MRW_THERMAL_POWER_LIMIT + </description> + <initToZero></initToZero> + <valueType>uint32</valueType> + <writeable/> + <mssUnit>cW</mssUnit> + <array> 2 2</array> + <mssAccessorName>dimm_thermal_limit</mssAccessorName> + </attribute> + + <attribute> <id>ATTR_MSS_RUNTIME_MEM_THROTTLED_N_COMMANDS_PER_PORT</id> <targetType>TARGET_TYPE_MCS</targetType> <description> @@ -1353,7 +1368,7 @@ M DRAM clocks setting for cfg_nm_n_per_port. </description> <initToZero></initToZero> - <valueType>uint32</valueType> + <valueType>uint16</valueType> <writeable/> <array>2</array> <mssAccessorName>runtime_mem_throttled_n_commands_per_port</mssAccessorName> @@ -1375,7 +1390,7 @@ <targetType>TARGET_TYPE_MCS</targetType> <description>Runtime throttle numerator setting for cfg_nm_n_per_slot</description> <initToZero></initToZero> - <valueType>uint32</valueType> + <valueType>uint16</valueType> <writeable/> <array>2</array> <mssAccessorName>runtime_mem_throttled_n_commands_per_slot</mssAccessorName> |
