diff options
| author | Brian Silver <bsilver@us.ibm.com> | 2016-09-04 15:08:12 -0500 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2018-12-17 20:34:42 -0600 |
| commit | 281819c9a3f66e31ce9e5117050c088f1743cc77 (patch) | |
| tree | d490ea9da09cb9915a556711a4af03094740aa08 /src/import/chips/p9/procedures/xml/attribute_info | |
| parent | b79b9ca39e1b6baf85b47390157415ab08b6677f (diff) | |
| download | talos-sbe-281819c9a3f66e31ce9e5117050c088f1743cc77.tar.gz talos-sbe-281819c9a3f66e31ce9e5117050c088f1743cc77.zip | |
Change PHY to use GPO, RLO, WLO from VPD
Remove extra slew calibration files
Update VBU VPD
Change-Id: I5681135761a19bf9223a1e63ed5a2d47d0944dc8
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29227
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69780
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Tested-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/attribute_info')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml | 42 |
1 files changed, 0 insertions, 42 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml index 6f1d2037..8c8f0e51 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mcs_attributes.xml @@ -2184,34 +2184,6 @@ </attribute> <attribute> - <id>ATTR_VPD_RLO</id> - <targetType>TARGET_TYPE_MCS</targetType> - <description> - This value comes from the VPD keyword MT byte 60 bits 4:7 for the Logical DIMM associated with port A. - Byte 124 bits 4:7 for port B, 188 bits 4:7 for port C and 252 bits 4:7 for port D - </description> - <initToZero></initToZero> - <valueType>uint8</valueType> - <array>2</array> - <mssAccessorName>vpd_rlo</mssAccessorName> - <writeable/> - </attribute> - - <attribute> - <id>ATTR_VPD_WLO</id> - <targetType>TARGET_TYPE_MCS</targetType> - <description> - This value comes from the VPD keyword MT byte 60 bits 0:3 for the Logical DIMM associated with port A. - Byte 124 bits 0:3 for port B, 188 bits 0:3 for port C and 252 bits 0:3 for port D - </description> - <initToZero></initToZero> - <valueType>uint8</valueType> - <array>2</array> - <mssAccessorName>vpd_wlo</mssAccessorName> - <writeable/> - </attribute> - - <attribute> <id>ATTR_EFF_DRAM_MODULE_BUS_WIDTH</id> <targetType>TARGET_TYPE_MCS</targetType> <description> @@ -2925,20 +2897,6 @@ </attribute> <attribute> - <id>ATTR_VPD_GPO</id> - <targetType>TARGET_TYPE_MCS</targetType> - <description> - This value comes from the VPD keyword MT bytes 61 MT(61) for the Logical DIMM - associated with port A. Bytes 125 for port B, 189 for port C and 253 for port D - </description> - <initToZero></initToZero> - <valueType>uint8</valueType> - <array>2</array> - <writeable/> - <mssAccessorName>vpd_gpo</mssAccessorName> - </attribute> - - <attribute> <id>ATTR_EFF_DRAM_TDQS</id> <targetType>TARGET_TYPE_MCS</targetType> <description> |
