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authorClaus Michael Olsen <cmolsen@us.ibm.com>2017-05-16 15:16:00 -0500
committerspashabk-in <shakeebbk@in.ibm.com>2017-09-12 00:17:48 -0500
commitfd64d4f87ed493df74dc1eef3a08961d28b79a23 (patch)
tree915ef8bcc08883d02b8c9d772498cceafe65fb97 /src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
parent14ef379b762dc5437278cbd780d0a64172147d20 (diff)
downloadtalos-sbe-fd64d4f87ed493df74dc1eef3a08961d28b79a23.tar.gz
talos-sbe-fd64d4f87ed493df74dc1eef3a08961d28b79a23.zip
xip_customize: GPTR/overlays stage 1 support
Updated to poll Nimbus DD level and whether there's support for overlays in the XIP interface. Further, updated to add three extra args in xip_customize API, two of which are to support a third ring work buffer for the overlays handling. This has necessitated making changes to hcode_image_build (HIB) API as well. Note that the calling codes of xip_customize and HIB need to be updated to supply the additional args in their APIs. Note that this code stage 1 will work for Nimbus DD2 with Gptr rings in Mvpd, and no Gptr rings in the HW image. It will, however, not work if there's content in .overlays or if there's Gptr rings already in the .rings section. Thus, the stage 1 code here will work with a DD2 image (i.e., that does NOT have Gptr rings in .rings in HW image) as long as noone has put any real Gptr initfiles in for processing (which would result in ring content in .overlays). We must ensure that the stage 2 code of xip_customize gets merged on the HB side to enable processing of .overlays content before we actually add any Gptr initfiles for the .overlays section into EKB. Change-Id: Ifd7b15dbfbef45d66b614e61c7aeaa5ac04c075a Original-Change-Id: I3d6ab8a9add239c92819613dcae21ef5faf0a1c5 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40591 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Sumit Kumar <sumit_kumar@in.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml')
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml19
1 files changed, 19 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
index ebb9133c..ce5479d6 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
@@ -4194,4 +4194,23 @@
</chipEcFeature>
</attribute>
<!-- ********************************************************************* -->
+ <attribute>
+ <id>ATTR_CHIP_EC_FEATURE_NO_GPTR_SUPPORT_VIA_MVPD</id>
+ <targetType>TARGET_TYPE_PROC_CHIP</targetType>
+ <description>
+ indicaes if there is GPTR support through MVPD which there will NOT be if
+ Nimbus DD1
+ </description>
+ <chipEcFeature>
+ <chip>
+ <name>ENUM_ATTR_NAME_NIMBUS</name>
+ <ec>
+ <value>0x20</value>
+ <test>LESS_THAN</test>
+ </ec>
+ </chip>
+ </chipEcFeature>
+ </attribute>
+ <!-- ********************************************************************* -->
+
</attributes>
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