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authorJoe McGill <jmcgill@us.ibm.com>2016-12-15 00:12:48 -0600
committerspashabk-in <shakeebbk@in.ibm.com>2017-09-12 00:12:36 -0500
commit816a0decfc2e98adecdf1c54cf3e15f8c366b3d4 (patch)
tree7d53fe946ba3448789abea4c970bd8b881c55ee6 /src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
parent4eaba78e5546827955dd0793ece93a9705b952cd (diff)
downloadtalos-sbe-816a0decfc2e98adecdf1c54cf3e15f8c366b3d4.tar.gz
talos-sbe-816a0decfc2e98adecdf1c54cf3e15f8c366b3d4.zip
Add MSS customization support from CRP0 Lx MVPD
Keyword V0 offsets are the same as V1 Move bad-bits error processing to 1.03 Change-Id: I8d48ae6ca0b6483b0e2612753717db202d574706 Original-Change-Id: I01e44c83f775b77e4ecc7afd7a5d92db524dfc98 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34073 Dev-Ready: Joseph J. McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml')
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml36
1 files changed, 1 insertions, 35 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
index 320bd701..b5c10f93 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
@@ -198,7 +198,7 @@
</chip>
</chipEcFeature>
</attribute>
- <!-- ******************************************************************** -->
+ <!-- ******************************************************************** -->
<attribute>
<id>ATTR_CHIP_EC_FEATURE_HW388878</id>
<targetType>TARGET_TYPE_PROC_CHIP</targetType>
@@ -467,23 +467,6 @@
</attribute>
<attribute>
- <id>ATTR_CHIP_EC_FEATURE_MSS_VCCD_OVERRIDE</id>
- <targetType>TARGET_TYPE_PROC_CHIP</targetType>
- <description>
- Override VREG control information
- </description>
- <chipEcFeature>
- <chip>
- <name>ENUM_ATTR_NAME_NIMBUS</name>
- <ec>
- <value>0x20</value>
- <test>LESS_THAN</test>
- </ec>
- </chip>
- </chipEcFeature>
- </attribute>
-
- <attribute>
<id>ATTR_CHIP_EC_FEATURE_MSS_VREF_DAC</id>
<targetType>TARGET_TYPE_PROC_CHIP</targetType>
<description>
@@ -501,23 +484,6 @@
</attribute>
<attribute>
- <id>ATTR_CHIP_EC_FEATURE_MSS_VREG_COARSE</id>
- <targetType>TARGET_TYPE_PROC_CHIP</targetType>
- <description>
- VREG Coarse work-around for Nimbus DD1.0
- </description>
- <chipEcFeature>
- <chip>
- <name>ENUM_ATTR_NAME_NIMBUS</name>
- <ec>
- <value>0x20</value>
- <test>LESS_THAN</test>
- </ec>
- </chip>
- </chipEcFeature>
- </attribute>
-
- <attribute>
<id>ATTR_CHIP_EC_FEATURE_MSS_WAT_DEBUG_ATTN</id>
<targetType>TARGET_TYPE_PROC_CHIP</targetType>
<description>
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