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author | Anusha Reddy Rangareddygari <anusrang@in.ibm.com> | 2016-06-30 14:44:56 +0200 |
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committer | spashabk-in <shakeebbk@in.ibm.com> | 2017-09-12 00:11:57 -0500 |
commit | 44e74b826eb9d0a07ef4ba5a862257bc1eff4727 (patch) | |
tree | f86537e12aedcd1cf7a492b4e6e1af3634813e5f /src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | |
parent | 9934c7d00712ab6c113cf62dff9324bc12cc5176 (diff) | |
download | talos-sbe-44e74b826eb9d0a07ef4ba5a862257bc1eff4727.tar.gz talos-sbe-44e74b826eb9d0a07ef4ba5a862257bc1eff4727.zip |
Ec_level attribute support for DD1 attributes
--Fixig hb_temp_defaults.xml
Change-Id: I8a022eb710afca62163e89f07f4c5ceaa1c8b194
Original-Change-Id: Iab140154483b10bd05a6dba092dad25f64eae742
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26450
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com>
Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml')
-rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 73 |
1 files changed, 73 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index 61243ef5..d21a5602 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -91,4 +91,77 @@ </chip> </chipEcFeature> </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_VITL_CLK_SETUP</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Nimbus DD1 for differentiating present/functional targets. True if: + Nimbus EC less than 20 + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x20</value> + <test>LESS_THAN</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ******************************************************************** --> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_FSI_GP_SHADOWS_OVERWRITE</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + DD1 attribute for assigning flushvalues to root_ctrl and perv_ctrl registers. True if: + Nimbus EC less than 20 + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x20</value> + <test>LESS_THAN</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ******************************************************************** --> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_N3_FLUSH_MODE</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + DD1 update : Flush mode not initiated for N3. True if: + Nimbus EC less than 20 + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x20</value> + <test>LESS_THAN</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ******************************************************************** --> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_SDISN_SETUP</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Sdis_n set or clear : flushing LCBES condition woraround. True if: + Nimbus EC less than 20 + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x20</value> + <test>LESS_THAN</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ******************************************************************** --> </attributes> |