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| author | Joe McGill <jmcgill@us.ibm.com> | 2018-05-31 17:59:38 -0500 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2018-06-05 02:20:34 -0400 |
| commit | d73e4c11febed4a029ea67456f72f7a213fdfb43 (patch) | |
| tree | 519f7fd42f6d32324b24eb9a2a46e7f12e820070 /src/import/chips/p9/procedures/hwp | |
| parent | bd17734ee3ab997221cc7a7f60bf7b67a71357fc (diff) | |
| download | talos-sbe-d73e4c11febed4a029ea67456f72f7a213fdfb43.tar.gz talos-sbe-d73e4c11febed4a029ea67456f72f7a213fdfb43.zip | |
mask core SPATTN bit used for core checkstop handshake
Change-Id: I9c0a7224c3880ab40bb9111d8f66449912029e2f
CQ: SW431474
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59707
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59713
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C index aee062ad..b70f66ce 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C +++ b/src/import/chips/p9/procedures/hwp/core/p9_hcd_core_scomcust.C @@ -74,6 +74,8 @@ p9_hcd_core_scomcust( l_data64.flush<0>().setBit(EX_CPPM_CPMMR_WKUP_NOTIFY_SELECT); FAPI_TRY(putScom(i_target, C_CPPM_CPMMR_CLEAR, l_data64)); + FAPI_TRY(putScom(i_target, C_SPATTN_MASK, 0x2222222200000000ULL)); + fapi_try_exit: FAPI_INF("<<p9_hcd_core_scomcust"); |
