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author | Joe McGill <jmcgill@us.ibm.com> | 2018-06-07 11:57:31 -0500 |
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committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2018-06-08 21:53:56 -0400 |
commit | b1c006980fb3650990fabaa934a0c90354e7ca57 (patch) | |
tree | 28f4c99e5d3d620f518b956181beaf8f3dca808d /src/import/chips/p9/procedures/hwp | |
parent | c49c39a81e986f13f37ea2f615b91b3f6c56eed4 (diff) | |
download | talos-sbe-b1c006980fb3650990fabaa934a0c90354e7ca57.tar.gz talos-sbe-b1c006980fb3650990fabaa934a0c90354e7ca57.zip |
p9_sbe_scominit -- unmask TP LFIR bit 37 for Cumulus
Change-Id: Id216f65d5c240d88c4db62e374c9f3278d623fbb
CQ: SW432374
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60118
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/60125
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C index 0664c7f9..a5ccda6d 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_sbe_scominit.C @@ -402,12 +402,28 @@ p9_sbe_scominit(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target) fapi2::TARGET_STATE_FUNCTIONAL)) { uint8_t l_unit_pos = 0; + fapi2::ATTR_CHIP_EC_FEATURE_SW432374_Type l_sw432374; + fapi2::buffer<uint64_t> l_tp_lfir_mask_and; + FAPI_INF("Call p9_sbe_common_configure_chiplet_FIR"); FAPI_TRY(p9_sbe_common_configure_chiplet_FIR(l_chplt_target)); FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_chplt_target, l_unit_pos), "Error from FAPI_ATTR_GET (ATTR_CHIP_UNIT_POS)"); + if (l_unit_pos == PERV_CHIPLET_ID) + { + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_SW432374, i_target, l_sw432374), + "Error from FAPI_ATTR_GET (ATTR_CHIP_EC_FEATURE_SW432374)"); + + if (l_sw432374) + { + l_tp_lfir_mask_and.flush<1>().clearBit<PERV_1_LOCAL_FIR_IN37>(); + FAPI_TRY(fapi2::putScom(i_target, PERV_TP_LOCAL_FIR_MASK_AND, l_tp_lfir_mask_and), + "Error from putScom (PERV_TP_LOCAL_FIR_MASK_AND)"); + } + } + if (l_unit_pos == N3_CHIPLET_ID) { // configure FBC PPE FIRs |