diff options
| author | Nick Klazynski <jklazyns@us.ibm.com> | 2017-01-09 08:43:04 -0600 |
|---|---|---|
| committer | AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com> | 2017-01-11 08:35:17 -0500 |
| commit | 9db0477faba296410c240b66dcd00747c8a781fd (patch) | |
| tree | 7d4f1b97f4f7d976aaa3876674229f5e6e743ba9 /src/import/chips/p9/procedures/hwp | |
| parent | 90b46fb91c12e231d8684bbf6bfeea99ef27a2a5 (diff) | |
| download | talos-sbe-9db0477faba296410c240b66dcd00747c8a781fd.tar.gz talos-sbe-9db0477faba296410c240b66dcd00747c8a781fd.zip | |
SW375288: Reads to C_RAS_MODEREG causes SPR corruption
Change-Id: Idf1c1e78657bddb1747dc6e72b0af67afad26a91
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34570
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34571
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/core/p9_thread_control.C | 32 |
1 files changed, 19 insertions, 13 deletions
diff --git a/src/import/chips/p9/procedures/hwp/core/p9_thread_control.C b/src/import/chips/p9/procedures/hwp/core/p9_thread_control.C index 45210949..aa43549a 100644 --- a/src/import/chips/p9/procedures/hwp/core/p9_thread_control.C +++ b/src/import/chips/p9/procedures/hwp/core/p9_thread_control.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER sbe Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -431,11 +431,13 @@ fapi2::ReturnCode p9_thread_control_sreset( { fapi2::buffer<uint64_t> l_mode_data; - FAPI_TRY(fapi2::getScom(i_target, C_RAS_MODEREG, l_mode_data), - "p9_thread_control_step: getScom error when reading ras_modreg for threads 0x%x", - i_threads); + // SW375288: Reads to C_RAS_MODEREG causes SPR corruption. For now, the code will assume no other + // bits are set and only set/clear mr_fence_interrupts + //FAPI_TRY(fapi2::getScom(i_target, C_RAS_MODEREG, l_mode_data), + // "p9_thread_control_step: getScom error when reading ras_modreg for threads 0x%x", + // i_threads); + //l_mode_data.clearBit<RAS_MODE_MR_FENCE_INTERRUPTS>(); - l_mode_data.clearBit<RAS_MODE_MR_FENCE_INTERRUPTS>(); FAPI_TRY(fapi2::putScom(i_target, C_RAS_MODEREG, l_mode_data), "p9_thread_control_step: putScom error when issuing ras_modreg step mode for threads 0x%x", i_threads); @@ -513,11 +515,12 @@ fapi2::ReturnCode p9_thread_control_start( { fapi2::buffer<uint64_t> l_mode_data; - FAPI_TRY(fapi2::getScom(i_target, C_RAS_MODEREG, l_mode_data), - "p9_thread_control_step: getScom error when reading ras_modreg for threads 0x%x", - i_threads); - - l_mode_data.clearBit<RAS_MODE_MR_FENCE_INTERRUPTS>(); + // SW375288: Reads to C_RAS_MODEREG causes SPR corruption. For now, the code will assume no other + // bits are set and only set/clear mr_fence_interrupts + //FAPI_TRY(fapi2::getScom(i_target, C_RAS_MODEREG, l_mode_data), + // "p9_thread_control_step: getScom error when reading ras_modreg for threads 0x%x", + // i_threads); + //l_mode_data.clearBit<RAS_MODE_MR_FENCE_INTERRUPTS>(); FAPI_TRY(fapi2::putScom(i_target, C_RAS_MODEREG, l_mode_data), "p9_thread_control_step: putScom error when issuing ras_modreg step mode for threads 0x%x", i_threads); @@ -603,9 +606,12 @@ fapi2::ReturnCode p9_thread_control_stop( // Block interrupts while stopped { fapi2::buffer<uint64_t> l_mode_data; - FAPI_TRY(fapi2::getScom(i_target, C_RAS_MODEREG, l_mode_data), - "p9_thread_control_step: getScom error when reading ras_modreg for threads 0x%x", - i_threads); + + // SW375288: Reads to C_RAS_MODEREG causes SPR corruption. For now, the code will assume no other + // bits are set and only set/clear mr_fence_interrupts + //FAPI_TRY(fapi2::getScom(i_target, C_RAS_MODEREG, l_mode_data), + // "p9_thread_control_step: getScom error when reading ras_modreg for threads 0x%x", + // i_threads); l_mode_data.setBit<RAS_MODE_MR_FENCE_INTERRUPTS>(); FAPI_TRY(fapi2::putScom(i_target, C_RAS_MODEREG, l_mode_data), |
