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| author | Anusha Reddy Rangareddygari <anusrang@in.ibm.com> | 2016-09-20 11:25:15 +0200 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2016-09-21 06:42:42 -0400 |
| commit | 93749c8818208de5c254da2b23a7b642d0a91e87 (patch) | |
| tree | ded97bcac9b9edd1be8ef12bedb653a3693db424 /src/import/chips/p9/procedures/hwp | |
| parent | 0a62b30ce373bdb8096fc886ce535078696c2cf4 (diff) | |
| download | talos-sbe-93749c8818208de5c254da2b23a7b642d0a91e87.tar.gz talos-sbe-93749c8818208de5c254da2b23a7b642d0a91e87.zip | |
Level 2 HWP for p9_sbe_tp_chiplet_init3
Change-Id: I52a3a79e88066a990f3ca7dc30cd199f3d65bb16
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29932
Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com>
Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Sunil Kumar <skumar8j@in.ibm.com>
Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29938
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C index ae843d3b..41801eb7 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_tp_chiplet_init3.C @@ -51,7 +51,7 @@ enum P9_SBE_TP_CHIPLET_INIT3_Private_Constants { START_CMD = 0x1, - REGIONS_ALL_EXCEPT_PIB_NET = 0x4FF, + REGIONS_ALL_EXCEPT_PIB_NET_PLL = 0x4FE, CLOCK_TYPES = 0x7, HW_NS_DELAY = 100000, // unit is nano seconds SIM_CYCLE_DELAY = 1000, // unit is sim cycles @@ -101,7 +101,7 @@ fapi2::ReturnCode p9_sbe_tp_chiplet_init3(const FAPI_TRY(p9_sbe_tp_chiplet_init3_region_fence_setup(l_tpchiplet)); FAPI_TRY(p9_perv_sbe_cmn_regions_setup_64(l_tpchiplet, - REGIONS_ALL_EXCEPT_PIB_NET, l_regions)); + REGIONS_ALL_EXCEPT_PIB_NET_PLL, l_regions)); FAPI_DBG("l_regions value: %#018lX", l_regions); FAPI_TRY(p9_sbe_common_clock_start_stop(l_tpchiplet, START_CMD, 0, 0, l_regions, |
