istep 4: only use one EX even if both are good

- p9_sbe_select_ex bug: fix QCSR to only represent the istep 4 core/EX
- istep4: Fix cache_scominit using qcsr to process EX

Change-Id: Ibccf8d4cae03dd36b1ff3256f27a7828f5b1c11e
RTC: 167053
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34684
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34685
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>

2 files changed, 47 insertions, 20 deletions

diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C
index 1bccbd62..40912011 100644
--- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C
+++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_scominit.C
@@ -97,6 +97,28 @@ p9_hcd_cache_scominit(
 
     for (auto l_iter = l_ex_targets.begin(); l_iter != l_ex_targets.end(); l_iter++)
     {
+        fapi2::Target<fapi2::TARGET_TYPE_EX> l_ex = *l_iter;
+        auto l_core_targets = l_ex.getChildren<fapi2::TARGET_TYPE_CORE>();
+
+        FAPI_ASSERT((l_core_targets.size() != 0),
+                    fapi2::PMPROC_CACHESCOMINIT_NOGOODCOREINEX().set_QCSR(l_qcsr),
+                    "NO Good Children Cores under this So-Called Good EX!");
+
+        auto l_core = l_core_targets.begin();
+        fapi2::Target<fapi2::TARGET_TYPE_CORE> l_ec   = *l_core;
+        fapi2::Target<fapi2::TARGET_TYPE_PERV> l_perv =
+            l_ec.getParent<fapi2::TARGET_TYPE_PERV>();
+
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_perv,
+                               l_attr_chip_unit_pos));
+        l_attr_chip_unit_pos = l_attr_chip_unit_pos - p9hcd::PERV_TO_CORE_POS_OFFSET;
+        l_exid               = (l_attr_chip_unit_pos >> 1);
+
+        if (!(l_exlist & (0x8000 >> l_exid)))
+        {
+            continue;
+        }
+
         FAPI_EXEC_HWP(l_rc, p9_l2_scom, *l_iter, l_sys);
 
         if (l_rc)
@@ -126,23 +148,6 @@ p9_hcd_cache_scominit(
 
         if (l_attr_sys_force_all_cores)
         {
-            fapi2::Target<fapi2::TARGET_TYPE_EX> l_ex = *l_iter;
-            auto l_core_targets = l_ex.getChildren<fapi2::TARGET_TYPE_CORE>();
-
-            FAPI_ASSERT((l_core_targets.size() != 0),
-                        fapi2::PMPROC_CACHESCOMINIT_NOGOODCOREINEX().set_QCSR(l_qcsr),
-                        "NO Good Children Cores under this So-Called Good EX!");
-
-            auto l_core = l_core_targets.begin();
-            fapi2::Target<fapi2::TARGET_TYPE_CORE> l_ec   = *l_core;
-            fapi2::Target<fapi2::TARGET_TYPE_PERV> l_perv =
-                l_ec.getParent<fapi2::TARGET_TYPE_PERV>();
-
-            FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_UNIT_POS, l_perv,
-                                   l_attr_chip_unit_pos));
-            l_attr_chip_unit_pos = l_attr_chip_unit_pos - p9hcd::PERV_TO_CORE_POS_OFFSET;
-            l_exid               = (l_attr_chip_unit_pos >> 1);
-
             FAPI_DBG("Setup L3-LCO on TARGET_ID[%d] via EX_L3_MODE_REG1[0,2-5,6-21]", l_exid);
             FAPI_TRY(getScom(*l_iter, EX_L3_MODE_REG1, l_data64));
             l_data64.insertFromRight<2, 4>(l_exid).insertFromRight<6, 16>(l_exlist);
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C
index 0d97e03c..04cd0822 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER sbe Project                                                  */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2016                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -57,17 +57,22 @@
 ///
 ///   Parameter indicates single core or all (controlled by Cronus/SBE)
 ///
+///     host_eq_found = false
 ///     loop over functional cores {
 ///         if mode == SINGLE {
-///             if first one {
+///             if !host_eq_found {
 ///                 Record the master core, EX and EQ number
 ///                 Add to MC Group 3
+///                 host_eq_found = true
 ///             }
 ///         }
 ///         Set bits in core and EX scoreboard for later updating the OCC
 ///         Set default PFET controller delay values into Core
+///         if host_eq_found (only set in single mode)
+///             break out of core loop
 ///       }
 ///
+///     host_eq_found = false
 ///     loop over functional EQs {
 ///         if mode == SINGLE {
 ///             if master EQ
@@ -77,10 +82,13 @@
 ///                         Add to MC Group 5 if Even (EX0)
 ///                         Add to MC Group 6 if Odd (EX1)
 ///                 }
+///                 host_eq_found = true
 ///             }
-///             Set bit in EQ scoreboard for later updating the OCC
 ///         }
+///         Set bit in EQ scoreboard for later updating the OCC
 ///         Set default PFET controller delay values into EQ
+///         if host_eq_found (only set in single mode)
+///             break out of EQ loop
 ///     }
 ///
 ///   Write resultant scoreboard EQ/Core mask into OCC complex
@@ -158,6 +166,7 @@ fapi2::ReturnCode p9_sbe_select_ex(
     uint8_t attr_force_all = 0;
     bool b_single = true;
     bool b_host_core_found = false;
+    bool b_host_eq_found = false;
 
     uint32_t l_master_ex_num = 0xFF;  // invalid EX number initialized
     uint32_t l_master_eq_num = 0xFF;  // invalid EQ number initialized
@@ -272,6 +281,12 @@ fapi2::ReturnCode p9_sbe_select_ex(
                                 l_data64),
                  "Error: Core PFET Delay register");
 
+        // if b_host_core_found (only set in single mode), break out of core loop
+        if (b_host_core_found)
+        {
+            break;
+        }
+
     } // Core loop
 
     // Process the good EQs
@@ -293,6 +308,7 @@ fapi2::ReturnCode p9_sbe_select_ex(
             if (l_eq_num == l_master_eq_num)
             {
                 FAPI_TRY(select_ex_add_eq_to_mc_group(eq));
+                b_host_eq_found = true;
             }
 
             for (auto i = l_eq_num * NUM_EX_PER_EQ; i < (l_eq_num + 1)*NUM_EX_PER_EQ; ++i)
@@ -322,6 +338,12 @@ fapi2::ReturnCode p9_sbe_select_ex(
                  "Error: EQ PFET Delay register, rc 0x%.8X",
                  (uint32_t)fapi2::current_err);
 
+        // if b_eq_eq_found (only set in single mode), break out of EQ loop
+        if (b_host_eq_found)
+        {
+            break;
+        }
+
     } // EQ loop