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| author | Raja Das <rajadas2@in.ibm.com> | 2018-06-27 06:18:29 -0500 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2018-07-12 23:28:30 -0400 |
| commit | 432a7bb830abb854794f050f6b863b8901856447 (patch) | |
| tree | dab77c9bb833755ec91466bd055421ba4c5fe9d3 /src/import/chips/p9/procedures/hwp | |
| parent | 2c410f1b22646c798e9202ad91986c10b797b1a2 (diff) | |
| download | talos-sbe-432a7bb830abb854794f050f6b863b8901856447.tar.gz talos-sbe-432a7bb830abb854794f050f6b863b8901856447.zip | |
Inverted logic of hasClock bit in Clock Status register
CQ: SW437571
Change-Id: I9101adc63225a97aeddf445519fa660d961c3d9c
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/61463
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/61471
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/pm/p9_query_core_access_state.C | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_query_core_access_state.C b/src/import/chips/p9/procedures/hwp/pm/p9_query_core_access_state.C index 6a4a0cac..b714fd9a 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_query_core_access_state.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_query_core_access_state.C @@ -175,7 +175,11 @@ p9_query_core_access_state( FAPI_TRY(fapi2::getScom(i_target, C_CLOCK_STAT_SL, l_data64), "Error reading data from C_CLOCK_STAT_SL"); l_data64.extractToRight<uint8_t>(c_exec_hasclocks, 6, 1); + // Inverted logic in the HW + c_exec_hasclocks = !c_exec_hasclocks; l_data64.extractToRight<uint8_t>(c_pc_hasclocks, 5, 1); + // Inverted logic in the HW + c_pc_hasclocks = !c_pc_hasclocks; } else { |
