diff options
| author | Greg Still <stillgs@us.ibm.com> | 2016-10-18 13:05:21 -0500 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-10-04 08:26:25 -0400 |
| commit | 199ffd0f7ccde60be075f0f0b85e8debfdd09e61 (patch) | |
| tree | 4587a970489a93efcc6d9f3b35efd19bd334f2e7 /src/import/chips/p9/procedures/hwp | |
| parent | edaa6aed3fcc9267380c4776a51a5396d222519a (diff) | |
| download | talos-sbe-199ffd0f7ccde60be075f0f0b85e8debfdd09e61.tar.gz talos-sbe-199ffd0f7ccde60be075f0f0b85e8debfdd09e61.zip | |
p9_ppe_commands: add -step_trap support
Change-Id: I734f2cafae2d6cb67b909459b80266052a988542
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31451
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: ASHISH A. MORE <ashish.more@in.ibm.com>
Reviewed-by: Brian T. Vanderpool <vanderp@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/47135
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/lib/p9_ppe_utils.H | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_ppe_utils.H b/src/import/chips/p9/procedures/hwp/lib/p9_ppe_utils.H index e71ebb62..c3a84030 100644 --- a/src/import/chips/p9/procedures/hwp/lib/p9_ppe_utils.H +++ b/src/import/chips/p9/procedures/hwp/lib/p9_ppe_utils.H @@ -64,12 +64,12 @@ typedef struct /** * @brief Offsets from base address for XIRs. */ -const static uint64_t PPE_XIXCR = 0x0; -const static uint64_t PPE_XIRAMRA = 0x1; -const static uint64_t PPE_XIRAMGA = 0x2; -const static uint64_t PPE_XIRAMDBG = 0x3; -const static uint64_t PPE_XIRAMEDR = 0x4; -const static uint64_t PPE_XIDBGPRO = 0x5; +const static uint64_t PPE_XIXCR = 0x0; //XCR_NONE +const static uint64_t PPE_XIRAMRA = 0x1; //XCR_SPRG0 +const static uint64_t PPE_XIRAMGA = 0x2; //IR_SPRG0 +const static uint64_t PPE_XIRAMDBG = 0x3; //XSR_SPRG0 +const static uint64_t PPE_XIRAMEDR = 0x4; //IR_EDR +const static uint64_t PPE_XIDBGPRO = 0x5; //XSR_IAR enum PPE_DUMP_MODE { |
