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| author | Joe McGill <jmcgill@us.ibm.com> | 2017-06-30 11:59:25 -0500 |
|---|---|---|
| committer | AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com> | 2017-07-03 06:33:52 -0400 |
| commit | 517a60f328e827ed207ef12c0d03f4579338886c (patch) | |
| tree | 1f9afd4a0a00a98683a5069ce0047d4cd5b259fb /src/import/chips/p9/procedures/hwp/perv | |
| parent | d1658d9114197fc93f7405841d05b5dc31f8c87b (diff) | |
| download | talos-sbe-517a60f328e827ed207ef12c0d03f4579338886c.tar.gz talos-sbe-517a60f328e827ed207ef12c0d03f4579338886c.zip | |
p9_sbe_select_ex -- skip new checks for b_single=false
breaks cache contained,force_all_cores modes
Change-Id: I7a609c14c1577a74339b4869078bc78abd203732
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42667
Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com>
Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com>
Dev-Ready: Brent Wieman <bwieman@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42675
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/perv')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C index c0588d19..61c25c00 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C @@ -382,7 +382,7 @@ fapi2::ReturnCode p9_sbe_select_ex( FAPI_TRY(fapi2::putScom(core, C_PPM_PFDLY, l_data64)); } // Core loop - FAPI_ASSERT(b_host_core_found, + FAPI_ASSERT(!b_single || b_host_core_found, fapi2::SBE_SELECT_EX_NO_CORE_AVAIL_ERROR() .set_CHIP(i_target), "No good cores found to boot with"); @@ -442,7 +442,7 @@ fapi2::ReturnCode p9_sbe_select_ex( } // EQ loop - FAPI_ASSERT(b_host_eq_found, + FAPI_ASSERT(!b_single || b_host_eq_found, fapi2::SBE_SELECT_EX_CORE_EQ_CONFIG_ERROR() .set_CHIP(i_target), "The cache chiplet associated with the first good core not functional"); |
