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| author | Anusha Reddy Rangareddygari <anusrang@in.ibm.com> | 2017-07-10 03:10:33 -0400 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-07-13 02:25:23 -0400 |
| commit | 40bee3d621ef42e6b9632a5a07be799d2331aa56 (patch) | |
| tree | 692cbbfa1f8c436cc6f8aa1f2a405b760aa05ec8 /src/import/chips/p9/procedures/hwp/perv | |
| parent | d040112cf7e566d841f03d3cf3207ad01e54f384 (diff) | |
| download | talos-sbe-40bee3d621ef42e6b9632a5a07be799d2331aa56.tar.gz talos-sbe-40bee3d621ef42e6b9632a5a07be799d2331aa56.zip | |
Add PERV chiplet to MCGR 0
Requested and supported by Dean Sanner (05-17-2017)
Pre-tested by Brian Stegmiller (05-17-2017)
Change-Id: I2bb87ed1b5e145646c035c0e29b39606ae41af30
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42922
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Soma Bhanutej <soma.bhanu@in.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-by: PARVATHI RACHAKONDA <prachako@in.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42923
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/perv')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C index 9e05481f..d995106f 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C @@ -178,6 +178,11 @@ fapi2::ReturnCode p9_sbe_chiplet_reset(const } } + // Setup Perv into MCG0 + FAPI_DBG("Adding PERV to Multicast group 0"); + FAPI_TRY(fapi2::putScom(i_target_chip, PERV_TP_MULTICAST_GROUP_1, + p9SbeChipletReset::MCGR_CNFG_SETTING_GROUP0)); + // Setup cache/cores multicast groups only in FORCE_ALL_CORE mode. // If not in FORCE_ALL_CORE mode, cache/core multicast groups will be setup // in preparation of p9_sbe_select_ex in preparation of istep 4. |
