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| author | Anusha Reddy Rangareddygari <anusrang@in.ibm.com> | 2016-09-16 15:04:09 +0200 |
|---|---|---|
| committer | Santosh S. Puranik <santosh.puranik@in.ibm.com> | 2016-09-21 02:36:17 -0400 |
| commit | 0a62b30ce373bdb8096fc886ce535078696c2cf4 (patch) | |
| tree | dff6260810e6b78f63d27938aa611fc3b8a86c63 /src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C | |
| parent | d7b92b5e575f7ed457ce63b6202c704284b676b3 (diff) | |
| download | talos-sbe-0a62b30ce373bdb8096fc886ce535078696c2cf4.tar.gz talos-sbe-0a62b30ce373bdb8096fc886ce535078696c2cf4.zip | |
Changing ATTR_PG from 32 to 16 bit
Change-Id: I346f10136e9621ea06e381cfad2a2b903cb2bd64
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29834
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Dev-Ready: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29836
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Reviewed-by: Shakeeb A. Pasha B K <shakeebbk@in.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: RAJA DAS <rajadas2@in.ibm.com>
Reviewed-by: Santosh S. Puranik <santosh.puranik@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C index 11beaf87..240287f4 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.C @@ -961,7 +961,7 @@ fapi_try_exit: static fapi2::ReturnCode p9_sbe_chiplet_reset_mc_setup_cache( const fapi2::Target<fapi2::TARGET_TYPE_PERV>& i_target_chiplet) { - uint32_t l_attr_pg = 0; + uint16_t l_attr_pg = 0; FAPI_INF("p9_sbe_chiplet_reset_mc_setup_cache: Entering ..."); FAPI_DBG("Reading ATTR_PG"); |
