Support 1byte data access on LPC

Currently LPC driver supports only 4bytes data access,
with this commit introducing support for 1byte and
also a way to extend this to 2bytes.

RTC: 194000
Change-Id: I7cb258425100c2d2a3e78f35f0aaf7da1c0e8508
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64174
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: RAJA DAS <rajadas2@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64176
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>

1 files changed, 35 insertions, 2 deletions

diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_lpc_utils.H b/src/import/chips/p9/procedures/hwp/perv/p9_lpc_utils.H
index dcf452ad..b9c1650c 100644
--- a/src/import/chips/p9/procedures/hwp/perv/p9_lpc_utils.H
+++ b/src/import/chips/p9/procedures/hwp/perv/p9_lpc_utils.H
@@ -35,25 +35,58 @@ const uint32_t LPC_CMD_TIMEOUT_DELAY_NS = 1000000;
 const uint32_t LPC_CMD_TIMEOUT_DELAY_CYCLE = 1000000;
 const uint32_t LPC_CMD_TIMEOUT_COUNT = 20;
 
+/*
+ * lpc_rw   read or write on a LPC bus address
+ *
+ * i_target_chip    reference to PROC target
+ * i_addr           address on LPC bus to read or write to
+ * i_size           size in bytes, currently supported 1 or 4 bytes
+ * i_read_notwrite  is read and not write, default to true
+ * i_generate_ffdc  if ffdc to be generated, default to true
+ * io_data          reference to a buffer to hold requested data, upto 4bytes
+ *
+ * FAPI2_RC_SUCCESS if success, else error code
+ */
 fapi2::ReturnCode lpc_rw(
     const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip,
     const uint32_t i_addr,
+    const size_t i_size,
     const bool i_read_notwrite,
     const bool i_generate_ffdc,
     fapi2::buffer<uint32_t>& io_data);
 
+/*
+ * lpc_read     Read uint32_t register on LPC bus
+ *
+ * i_target_chip    reference to PROC target
+ * i_addr           address of the register
+ * o_data           reference to output buffer
+ * i_generate_ffdc  generate ffdc, default to true
+ *
+ * FAPI2_RC_SUCCESS if success, else error code
+ */
 static inline fapi2::ReturnCode lpc_read(
     const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip,
     uint32_t i_addr, fapi2::buffer<uint32_t>& o_data, bool i_generate_ffdc = true)
 {
-    return lpc_rw(i_target_chip, i_addr, true, i_generate_ffdc, o_data);
+    return lpc_rw(i_target_chip, i_addr, sizeof(uint32_t), true, i_generate_ffdc, o_data);
 }
 
+/*
+ * lpc_write    Write to uint32_t register on LPC bus
+ *
+ * i_target_chip    reference to PROC target
+ * i_addr           address of the register
+ * i_data           data to be written
+ * i_generate_ffdc  generate ffdc, default to true
+ *
+ * FAPI2_RC_SUCCESS if success, else error code
+ */
 static inline fapi2::ReturnCode lpc_write(
     const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target_chip,
     uint32_t i_addr, fapi2::buffer<uint32_t> i_data, bool i_generate_ffdc = true)
 {
-    return lpc_rw(i_target_chip, i_addr, false, i_generate_ffdc, i_data);
+    return lpc_rw(i_target_chip, i_addr, sizeof(uint32_t), false, i_generate_ffdc, i_data);
 }
 
 #endif /* P9_LPC_UTILS_H_ */