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authorCHRISTINA L. GRAVES <clgraves@us.ibm.com>2016-07-13 12:38:39 -0500
committerSachin Gupta <sgupta2m@in.ibm.com>2016-10-24 11:50:58 -0400
commite7f782b083393dfdb6d81ad7c22a9d4d784a8023 (patch)
tree863ad9c9c099f0873d1308e8964f43c95412cccb /src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.H
parent4d332a67f72d050a9be730d031fba212a99b7c65 (diff)
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p9_sbe_check_quiesce L1
Change-Id: I791b99ec4f87b63a58b2503de4ce87c8b9a3b07c Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26989 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31705 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
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+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/import/chips/p9/procedures/hwp/nest/p9_sbe_check_quiesce.H $ */
+/* */
+/* OpenPOWER sbe Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+//-----------------------------------------------------------------------------------
+//
+/// @file p9_sbe_check_quiesce.H
+/// @brief Check quiesce state for all units on the powerbus
+///
+// *HWP HWP Owner: Christina Graves clgraves@us.ibm.com
+// *HWP FW Owner: Thi Tran thi@us.ibm.com
+// *HWP Team: Nest
+// *HWP Level: 1
+// *HWP Consumed by:
+// ----------------------------------------------------------------------------------
+//
+// *! ADDITIONAL COMMENTS :
+// *!
+// *! The purpose of this procedure is to check quiesce state for all units on the
+// *! powerbus on its chip if the queisce fails then this HWP will checkstop the system
+// *!
+// *! Succcessful operation assumes that:
+// *! o System clocks are running
+// *! o Fabric is initalized
+// *!
+// *!
+//-----------------------------------------------------------------------------------
+
+#ifndef _P9_SBE_CHECK_QUIESCE_H_
+#define _P9_SBE_CHECK_QUIESCE_H_
+
+//-----------------------------------------------------------------------------------
+// Includes
+//-----------------------------------------------------------------------------------
+
+#include <fapi2.H>
+
+//-----------------------------------------------------------------------------------
+// Structure definitions
+//-----------------------------------------------------------------------------------
+
+//function pointer typedef definition for HWP call support
+typedef fapi2::ReturnCode
+(*p9_sbe_check_quiesce_FP_t) (const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&
+ );
+
+//-----------------------------------------------------------------------------------
+// Constant definitions
+//-----------------------------------------------------------------------------------
+
+extern "C" {
+
+//-----------------------------------------------------------------------------------
+// Function prototype
+//-----------------------------------------------------------------------------------
+
+ /// @brief SBE will check quiesce state for all units on the powerbus on its chip if the queisce fails then this HWP will checkstop the system
+ /// @param[in] i_target => P9 chip target
+ /// @return FAPI_RC_SUCCESS if the check_quiesce completes successfully
+ fapi2::ReturnCode p9_sbe_check_quiesce(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
+
+ /// @brief Helper function to check the quiesce on OCC/PM
+ /// @param[in] i_target => P9 chip target
+ /// @return FAPI_RC_SUCCESS if the check_quiesce completes successfully
+ fapi2::ReturnCode p9_occ_pm_check_quiesce(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
+
+ /// @brief Helper function to check the quiesce on EC/EQ
+ /// @param[in] i_target => P9 chip target
+ /// @return FAPI_RC_SUCCESS if the check_quiesce completes successfully
+ fapi2::ReturnCode p9_ec_eq_check_quiesce(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
+
+ /// @brief Helper function to check the quiesce on AFU
+ /// @param[in] i_target => P9 chip target
+ /// @return FAPI_RC_SUCCESS if the check_quiesce completes successfully
+ fapi2::ReturnCode p9_afu_check_quiesce(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
+
+ /// @brief Helper funcion to check the quiesce on PSL
+ /// @param[in] i_target => P9 chip target
+ /// @return FAPI_RC_SUCCESS if the check_quiesce completes successfully
+ fapi2::ReturnCode p9_psl_check_quiesce(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
+
+ /// @brief Helper function to check the quiesce for CAPP
+ /// @param[in] i_target => P9 chip target
+ /// @return FAPI_RC_SUCCESS if the check_quiesce completes successfully
+ fapi2::ReturnCode p9_capp_check_quiesce(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
+
+ /// @brief Helper function to check the quiesce for PHB
+ /// @param[in] i_target => P9 chip target
+ /// @return FAPI_RC_SUCCESS if the check_quiesce completes successfully
+ fapi2::ReturnCode p9_phb_check_quiesce(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
+
+ /// @brief Helper function to check the quiesce for NPU
+ /// @param[in] i_target => P9 chip target
+ /// @return FAPI_RC_SUCCESS if the check_quiesce completes successfully
+ fapi2::ReturnCode p9_npu_check_quiesce(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
+
+ /// @brief Helper function to check the quiesce for NX
+ /// @param[in] i_target => P9 chip target
+ /// @return FAPI_RC_SUCCESS if the check_quiesce completes successfully
+ fapi2::ReturnCode p9_nx_check_quiesce(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
+
+ /// @brief Helper function to check the quiesce for HCA
+ /// @param[in] i_target => P9 chip target
+ /// @return FAPI_RC_SUCCESS if the check_quiesce completes successfully
+ fapi2::ReturnCode p9_hca_check_quiesce(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
+
+ /// @brief Helper function to check the quiesce for PSIHB
+ /// @param[in] i_target => P9 chip target
+ /// @return FAPI_RC_SUCCESS if the check_quiesce completes successfully
+ fapi2::ReturnCode p9_psihb_check_quiesce(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
+
+ /// @brief Helper function to check the quiesce for VAS
+ /// @param[in] i_target => P9 chip target
+ /// @return FAPI_RC_SUCCESS if the check_quiesce completes successfully
+ fapi2::ReturnCode p9_vas_check_quiesce(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
+
+ /// @brief Helper function to check the quiesce for INTP
+ /// @param[in] i_target => P9 chip target
+ /// @return FAPI_RC_SUCCESS if the check_quiesce completes successfully
+ fapi2::ReturnCode p9_intp_check_quiesce(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
+
+ /// @brief Helper function to set LQA
+ /// @param[in] i_target => P9 chip target
+ /// @return FAPI_RC_SUCCESS if the set_lqa completes successfully
+ fapi2::ReturnCode p9_set_lqa(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
+
+} //extern "C"
+
+#endif //_P9_SBE_CHECK_QUIESCE_H_
+
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