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author | Thi Tran <thi@us.ibm.com> | 2017-07-18 07:47:10 -0500 |
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committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-07-24 00:27:20 -0400 |
commit | c1be4551422df7732ee2c6dbe34c75a555cdbf0a (patch) | |
tree | 05ab327cd1f7e8cc1e9f5bc05b242a506b6c355e /src/import/chips/p9/procedures/hwp/nest/p9_l3_flush.C | |
parent | b6ae8bbc051d787c7d8a915f1e4e6410626e78c9 (diff) | |
download | talos-sbe-c1be4551422df7732ee2c6dbe34c75a555cdbf0a.tar.gz talos-sbe-c1be4551422df7732ee2c6dbe34c75a555cdbf0a.zip |
L3 Update - p9_l2/l3_flush.C
Change-Id: I665dcc102cd019be1856a3c7e9ccbe3a99fb43f2
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43264
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43266
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/nest/p9_l3_flush.C')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9_l3_flush.C | 184 |
1 files changed, 90 insertions, 94 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_l3_flush.C b/src/import/chips/p9/procedures/hwp/nest/p9_l3_flush.C index e7ba964f..6a9346f3 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_l3_flush.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_l3_flush.C @@ -22,20 +22,18 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ -//-------------------------------------------------------------------------- -// -// + +///----------------------------------------------------------------------------- +/// /// @file p9_l3_flush.C -/// @brief Initiates an L3 purge request and spins until completion +/// @brief Initiates an L3 purge request /// -// *HWP HWP Owner Christina Graves clgraves@us.ibm.com -// *HWP FW Owner: Thi Tran thi@us.ibm.com -// *HWP Team: Nest -// *HWP Level: 2 -// *HWP Consumed by: HB -// -//-------------------------------------------------------------------------- - +/// *HWP HWP Owner: Benjamin Gass <bgass@us.ibm.com> +/// *HWP FW Owner: Thi Tran thi@us.ibm.com +/// *HWP Team: Nest +/// *HWP Level: 3 +/// *HWP Consumed by: FSP and SBE +/// ---------------------------------------------------------------------------- //-------------------------------------------------------------------------- // Includes @@ -44,102 +42,100 @@ #include <p9_quad_scom_addresses.H> #include <p9_quad_scom_addresses_fld.H> -extern "C" { - //-------------------------------------------------------------------------- // Constant definitions //-------------------------------------------------------------------------- -//L3 purge operation delay times for HW/sim - const uint32_t P9_L3_FLUSH_HW_NS_DELAY = 50000; - const uint32_t P9_L3_FLUSH_SIM_CYCLE_DELAY = 1000000; +// L3 purge operation delay times for HW/sim +const uint32_t P9_L3_FLUSH_HW_NS_DELAY = 50000; +const uint32_t P9_L3_FLUSH_SIM_CYCLE_DELAY = 1000000; -//If the L3 purge is not completed in P9_L3_FLUSH_TIMEOUT delays, fail with error - const uint32_t P9_L3_FLUSH_TIMEOUT_COUNT = 40; +// If the L3 purge is not completed in P9_L3_FLUSH_TIMEOUT delays, fail with error +const uint32_t P9_L3_FLUSH_TIMEOUT_COUNT = 40; //-------------------------------------------------------------------------- // HWP entry point //-------------------------------------------------------------------------- - fapi2::ReturnCode p9_l3_flush(const - fapi2::Target<fapi2::TARGET_TYPE_EX>& i_target, - const uint32_t i_purge_type, - const uint32_t i_purge_addr/*, - const uint32_t i_purge_member*/) - { - // mark HWP entry - FAPI_DBG("Entering ...\n"); - - fapi2::buffer<uint64_t> purge_reg_data(0x0); - uint32_t purge_pending_count = 0; - - //Make sure that the inputs are acceptable - //Make sure the purge type is full purge, single purge, single delete, full blind, or dynamic - //Make sure that the purge address fits withing bits 17:28 - FAPI_ASSERT(!((i_purge_type != L3_FULL_PURGE) && - (i_purge_type != L3_SINGLE_PURGE) && - (i_purge_type != L3_FULL_BLIND_PURGE) && - (i_purge_type != L3_DYNAMIC_PURGE)) && - (i_purge_addr < 0x1000) /*&& - (i_purge_member < 0x20) */ - , fapi2::P9_L3_FLUSH_INVALID_ARGS_ERR().set_TARGET(i_target).set_PURGETYPE(i_purge_type).set_PURGEADDR( - i_purge_addr)/*.set_PURGEMEMBER(i_purge_member)*/, "i_purge_type is not a compatible type"); - - //Make sure that another flush is not happening - FAPI_DBG("Verifying that a previous flush is not active"); - FAPI_TRY(fapi2::getScom(i_target, EX_PRD_PURGE_REG, purge_reg_data), "Error reading from the PRD_PURGE_REG"); - FAPI_ASSERT(!(purge_reg_data.getBit<EX_PRD_PURGE_REG_L3_REQ>()), - fapi2::P9_L3_FLUSH_PREVIOUS_PURGE_ACTIVE_ERR().set_TARGET(i_target).set_PURGEREG(purge_reg_data), - "Previous Purge request has not completed error"); - - //Since there is no previous purge, build the purge request - - //Flush the data and sset the req bit to initiate the purge - purge_reg_data.flush<0>().setBit<EX_PRD_PURGE_REG_L3_REQ>(); - - //set the type of the purge - purge_reg_data.insertFromRight < EX_PRD_PURGE_REG_L3_TTYPE, - EX_PRD_PURGE_REG_L3_TTYPE_LEN > (i_purge_type); - - //set the address of where to start for the address - purge_reg_data.insertFromRight < EX_PRD_PURGE_REG_L3_DIR_ADDR, - EX_PRD_PURGE_REG_L3_DIR_ADDR_LEN> (i_purge_addr); - - /* - //set the member if singe line delete/purge - if ((i_purge_type == L3_SINGLE_PURGE) || (i_purge_type == L3_SINGLE_DELETE)) - { - purge_reg_data.insertFromRight<EX_PRD_PURGE_REG_L3_MEMBER, EX_PRD_PURGE_REG_L3_MEMBER_LEN>(i_purge_member); - }*/ - //Write the purge request - FAPI_TRY(fapi2::putScom(i_target, EX_PRD_PURGE_REG, purge_reg_data), "Error writing to the PRD_PURGE_REG"); - - //Spin on PRD_PURGE_REQ until hardware clears it - while(purge_pending_count < P9_L3_FLUSH_TIMEOUT_COUNT) - { - FAPI_DBG("Waiting for purge to complete..."); - - FAPI_TRY(fapi2::delay(P9_L3_FLUSH_HW_NS_DELAY, P9_L3_FLUSH_SIM_CYCLE_DELAY), "Error from P9 L3 flush delay"); +// TODO: RTC 177535 - Do we support SINGLE_PURGE/DELETE? +fapi2::ReturnCode p9_l3_flush( + const fapi2::Target<fapi2::TARGET_TYPE_EX>& i_target, + const uint32_t i_purge_type, + const uint32_t i_purge_addr) +{ + // mark HWP entry + FAPI_DBG("Entering ...\n"); + + fapi2::buffer<uint64_t> purge_reg_data(0x0); + uint32_t purge_pending_count = 0; + + //Make sure that the inputs are acceptable + //Make sure the purge type is full purge, single purge, single delete, full blind, or dynamic + //Make sure that the purge address fits withing bits 17:28 + FAPI_ASSERT(!((i_purge_type != L3_FULL_PURGE) && + (i_purge_type != L3_SINGLE_PURGE) && + (i_purge_type != L3_FULL_BLIND_PURGE) && + (i_purge_type != L3_DYNAMIC_PURGE)) && + (i_purge_addr < 0x1000), + fapi2::P9_L3_FLUSH_INVALID_ARGS_ERR() + .set_TARGET(i_target) + .set_PURGETYPE(i_purge_type) + .set_PURGEADDR(i_purge_addr), + "i_purge_type is not a compatible type"); + + //Make sure that another flush is not happening + FAPI_DBG("Verifying that a previous flush is not active"); + FAPI_TRY(fapi2::getScom(i_target, EX_PRD_PURGE_REG, purge_reg_data)); + FAPI_ASSERT(!(purge_reg_data.getBit<EX_PRD_PURGE_REG_L3_REQ>()), + fapi2::P9_L3_FLUSH_PREVIOUS_PURGE_ACTIVE_ERR() + .set_TARGET(i_target) + .set_PURGEREG(purge_reg_data), + "Previous Purge request has not completed error"); + + //Since there is no previous purge, build the purge request + + //Flush the data and set the req bit to initiate the purge + purge_reg_data.flush<0>().setBit<EX_PRD_PURGE_REG_L3_REQ>(); + + //set the type of the purge + purge_reg_data.insertFromRight<EX_PRD_PURGE_REG_L3_TTYPE, + EX_PRD_PURGE_REG_L3_TTYPE_LEN> (i_purge_type); + + //set the address of where to start for the address + purge_reg_data.insertFromRight<EX_PRD_PURGE_REG_L3_DIR_ADDR, + EX_PRD_PURGE_REG_L3_DIR_ADDR_LEN> (i_purge_addr); + + //Write the purge request + FAPI_TRY(fapi2::putScom(i_target, EX_PRD_PURGE_REG, purge_reg_data)); + + //Spin on PRD_PURGE_REQ until hardware clears it + while(purge_pending_count < P9_L3_FLUSH_TIMEOUT_COUNT) + { + FAPI_DBG("Waiting for purge to complete..."); - FAPI_TRY(fapi2::getScom(i_target, EX_PRD_PURGE_REG, purge_reg_data), "Error reading from the PRD_PURGE_REG"); + FAPI_TRY(fapi2::delay(P9_L3_FLUSH_HW_NS_DELAY, + P9_L3_FLUSH_SIM_CYCLE_DELAY)); - if (!purge_reg_data.getBit<EX_PRD_PURGE_REG_L3_REQ>()) - { - FAPI_DBG("Purge complete!"); - break; - } + FAPI_TRY(fapi2::getScom(i_target, EX_PRD_PURGE_REG, purge_reg_data)); - purge_pending_count++; + if (!purge_reg_data.getBit<EX_PRD_PURGE_REG_L3_REQ>()) + { + FAPI_DBG("Purge complete!"); + break; } - FAPI_ASSERT(purge_pending_count < P9_L3_FLUSH_TIMEOUT_COUNT, - fapi2::P9_L3_FLUSH_PURGE_REQ_TIMEOUT_ERR().set_TARGET(i_target).set_PURGETYPE(i_purge_type).set_PURGEADDR( - i_purge_addr)/*set_PURGEMEMBER(i_purge_member)*/, "Purge did not complete in time"); - - fapi_try_exit: - FAPI_DBG("Exiting..."); - return fapi2::current_err; + purge_pending_count++; } -} // extern "C" - + FAPI_ASSERT(purge_pending_count < P9_L3_FLUSH_TIMEOUT_COUNT, + fapi2::P9_L3_FLUSH_PURGE_REQ_TIMEOUT_ERR() + .set_TARGET(i_target) + .set_PURGETYPE(i_purge_type) + .set_PURGEADDR(i_purge_addr) + .set_EX_PRD_PURGE_REG_DATA(purge_reg_data), + "Purge did not complete in time."); + +fapi_try_exit: + FAPI_DBG("Exiting..."); + return fapi2::current_err; +} |