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author | Joe McGill <jmcgill@us.ibm.com> | 2017-05-09 20:29:54 -0500 |
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committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-05-28 09:18:41 -0400 |
commit | cc5c3a7b068c9501898a9a681b609b156446ef15 (patch) | |
tree | d282911fe2251befe0df6ffd9444a8c8e4025f39 /src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H | |
parent | 8f866022b78ea88dce15453ba8d542f38e8772da (diff) | |
download | talos-sbe-cc5c3a7b068c9501898a9a681b609b156446ef15.tar.gz talos-sbe-cc5c3a7b068c9501898a9a681b609b156446ef15.zip |
L3 updates -- p9_build_smp, p9_fbc_utils
p9_build_smp:
constrain FFDC collection at 16 chips (current max size for P9 based systems)
scrub node references, replace with group
clarify X link requirements based on pump mode
review and complete callouts
p9_fbc_utils:
add feature attribute to support pb_init sampling on NDD2+
replace locally defined bit constants with SCOM header file constants
Change-Id: Ib1f71488ffd07580a647709d9227112f7d73384f
CQ: HW328175
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40308
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: DHRUVARAJ SUBHASH CHANDRAN <dhruvaraj@in.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40310
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H index 15a6ff37..5c7f54c9 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H +++ b/src/import/chips/p9/procedures/hwp/nest/p9_fbc_utils.H @@ -34,7 +34,7 @@ // *HWP HWP Owner: Joe McGill <jmcgill@us.ibm.com> // *HWP FW Owner: Thi Tran <thi@us.ibm.com> // *HWP Team: Nest -// *HWP Level: 2 +// *HWP Level: 3 // *HWP Consumed by: SBE,HB,FSP // @@ -78,9 +78,9 @@ const uint64_t FABRIC_CACHELINE_SIZE = 0x80; /// @brief Read FBC/ADU registers to determine state of fabric init and stop /// control signals /// -/// @param[in] i_target Reference to processor chip target -/// @param[out] o_is_initialized State of fabric init signal -/// @param[out] o_is_running State of fabric pervasive stop control +/// @param[in] i_target Reference to processor chip target +/// @param[out] o_is_initialized State of fabric init signal +/// @param[out] o_is_running State of fabric pervasive stop control /// @return fapi::ReturnCode, FAPI2_RC_SUCCESS if success, else error code. /// fapi2::ReturnCode p9_fbc_utils_get_fbc_state( @@ -92,7 +92,7 @@ fapi2::ReturnCode p9_fbc_utils_get_fbc_state( /// @brief Use ADU pMisc Mode register to clear fabric stop signal, overriding /// a stop condition caused by a checkstop /// -/// @param[in] i_target Reference to processor chip target +/// @param[in] i_target Reference to processor chip target /// @return fapi::ReturnCode, FAPI2_RC_SUCCESS if success, else error code. /// fapi2::ReturnCode p9_fbc_utils_override_fbc_stop( |