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author | Nick Klazynski <jklazyns@us.ibm.com> | 2017-06-10 12:03:30 -0500 |
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committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-06-14 23:16:25 -0400 |
commit | 0d12082b94f309426065aedccc6ba4e54ded59f1 (patch) | |
tree | f1837af655efd6d5571732bb5c0a69715b44d400 /src/import/chips/p9/procedures/hwp/initfiles | |
parent | e38e29bf80c8c6a64ff26f8ebc633461e5e20ccc (diff) | |
download | talos-sbe-0d12082b94f309426065aedccc6ba4e54ded59f1.tar.gz talos-sbe-0d12082b94f309426065aedccc6ba4e54ded59f1.zip |
Add core workaround for HW407136
Remove ATTR for HW396388; EN_ATTN is needed for all chips
Mask PC_OTHER_CORE_CHIPLET_SYS_XSTOP_ERROR for SW390012
Change-Id: I70280ca7dfdd22ee88780c8cf76444283d1a4213
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41646
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Kevin F. Reick <reick@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41647
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/initfiles')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/initfiles/p9_core_scom.C | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_core_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_core_scom.C index 80f65383..afb1c8d8 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_core_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_core_scom.C @@ -29,7 +29,7 @@ using namespace fapi2; -constexpr uint64_t literal_0x0301D70000AB7696 = 0x0301D70000AB7696; +constexpr uint64_t literal_0x0301D70000AB76B6 = 0x0301D70000AB76B6; constexpr uint64_t literal_0x0000000000000000 = 0x0000000000000000; constexpr uint64_t literal_0xA854009775100008 = 0xA854009775100008; @@ -40,7 +40,7 @@ fapi2::ReturnCode p9_core_scom(const fapi2::Target<fapi2::TARGET_TYPE_CORE>& TGT { FAPI_TRY(fapi2::getScom( TGT0, 0x20010a43ull, l_scom_buffer )); - l_scom_buffer.insert<0, 64, 0, uint64_t>(literal_0x0301D70000AB7696 ); + l_scom_buffer.insert<0, 64, 0, uint64_t>(literal_0x0301D70000AB76B6 ); FAPI_TRY(fapi2::putScom(TGT0, 0x20010a43ull, l_scom_buffer)); } { |