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author | Prem Shanker Jha <premjha2@in.ibm.com> | 2019-09-13 00:10:41 -0500 |
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committer | RAJA DAS <rajadas2@in.ibm.com> | 2019-09-25 11:47:36 -0500 |
commit | b05b7eb24e29eff4a767a7e0d4883a16a989a55b (patch) | |
tree | d58001797183e2b27da25eecbaf05fdb925e987f /src/import/chips/p9/procedures/hwp/cache | |
parent | 1e5e13ce57c43575557bfa9c0dc54ab18951c51a (diff) | |
download | talos-sbe-b05b7eb24e29eff4a767a7e0d4883a16a989a55b.tar.gz talos-sbe-b05b7eb24e29eff4a767a7e0d4883a16a989a55b.zip |
PM: Modified FFDC to avoid corruption of RC in error path.
On FSP platform, in case of some errors, HWP captures
certain EX level registers. To ensure availability of
such registers, FSP first attempts special wakeup.
Special wakeup HWP uses FAPI_TRY in its code path. It
is known that in FFDC collection path, use of FAPI_TRY
leads to corruption of original FAPI2 RC. Commit
removes such registers from the capture list.
Key_Cronus_Test=PM_REGRESS
Change-Id: I23ce8b1a8a4a61f71c7b33c1122fcfac905616c4
CQ: SW471606
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/83863
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Gregory S Still <stillgs@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/83956
Reviewed-by: RAJA DAS <rajadas2@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/cache')
0 files changed, 0 insertions, 0 deletions