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| author | Ben Gass <bgass@us.ibm.com> | 2016-09-09 14:14:33 -0500 |
|---|---|---|
| committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2016-09-14 08:50:33 -0400 |
| commit | cd86adc7bca6eb76474a39508df288f3566b249c (patch) | |
| tree | 8d89b9de2f84e61f0dee073785e4b7cab98bc447 /src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.C | |
| parent | b359ebb8e304de09ee7602286791fb7de797e16e (diff) | |
| download | talos-sbe-cd86adc7bca6eb76474a39508df288f3566b249c.tar.gz talos-sbe-cd86adc7bca6eb76474a39508df288f3566b249c.zip | |
Multicast/L2loader updates.
p9_sbe_chiplet_reset - Needs to be ran in cc mode.
Will now only setup multicast in cache/core for cc
mode, and not do anything else.
p9_hcd_cache_initf - Needs to be ran after l2loader now.
Will not write l3 refr rings in cc mode.
p9_l2loader - Will not correct multicast groups, will
apply l3 refr rings.
Change-Id: I30b51e0a32cc883b777fcccdc7be87569e9f60f8
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29432
Dev-Ready: Brent Wieman <bwieman@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph E. Dery <dery@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29435
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.C')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.C | 31 |
1 files changed, 27 insertions, 4 deletions
diff --git a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.C b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.C index 3eb56747..4d29d70c 100644 --- a/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.C +++ b/src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.C @@ -1,7 +1,7 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.C $ */ +/* $Source: src/import/chips/p9/procedures/hwp/cache/p9_hcd_cache_initf.C $ */ /* */ /* OpenPOWER sbe Project */ /* */ @@ -59,6 +59,14 @@ p9_hcd_cache_initf( { FAPI_INF(">>p9_hcd_cache_initf"); +#ifndef __PPE__ + const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> l_sys; + uint8_t l_attr_system_ipl_phase; + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SYSTEM_IPL_PHASE, l_sys, + l_attr_system_ipl_phase)); +#endif + FAPI_DBG("Scan eq_fure ring"); FAPI_TRY(fapi2::putRing(i_target, eq_fure), "Error from putRing (eq_fure)"); @@ -77,9 +85,24 @@ p9_hcd_cache_initf( FAPI_DBG("Scan ex_l3_fure ring"); FAPI_TRY(fapi2::putRing(l_ex_target, ex_l3_fure), "Error from putRing (ex_l3_fure)"); - FAPI_DBG("Scan ex_l3_refr_fure ring"); - FAPI_TRY(fapi2::putRing(l_ex_target, ex_l3_refr_fure), - "Error from putRing (ex_l3_refr_fure)"); + +#ifndef __PPE__ + + if (l_attr_system_ipl_phase == + fapi2::ENUM_ATTR_SYSTEM_IPL_PHASE_CACHE_CONTAINED) + { + FAPI_DBG("Cache contained: Skipping ex_l3_refr ring scan"); + } + else + { +#endif + FAPI_DBG("Scan ex_l3_refr_fure ring"); + FAPI_TRY(fapi2::putRing(l_ex_target, ex_l3_refr_fure), + "Error from putRing (ex_l3_refr_fure)"); +#ifndef __PPE__ + } + +#endif } fapi_try_exit: |
