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author | Joe McGill <jmcgill@us.ibm.com> | 2017-04-28 14:19:45 -0500 |
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committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2017-05-11 10:11:37 -0400 |
commit | 598baada7a26aae90ba1d2ea4531becfdd3be935 (patch) | |
tree | 1f41e2041d02d1594e14df93cbbc400256b840c7 /src/import/chips/p9/common/include/p9_perv_scom_addresses_fld_fixes.H | |
parent | f9793c25e71653e600454f52efcd542278cfda47 (diff) | |
download | talos-sbe-598baada7a26aae90ba1d2ea4531becfdd3be935.tar.gz talos-sbe-598baada7a26aae90ba1d2ea4531becfdd3be935.zip |
p9_nv_ref_clk_enable -- shift NV refclock field programming
Change-Id: I4d0d4c6d32ba42f0760142cca01ac15ab4e42108
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39831
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39839
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'src/import/chips/p9/common/include/p9_perv_scom_addresses_fld_fixes.H')
-rw-r--r-- | src/import/chips/p9/common/include/p9_perv_scom_addresses_fld_fixes.H | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/src/import/chips/p9/common/include/p9_perv_scom_addresses_fld_fixes.H b/src/import/chips/p9/common/include/p9_perv_scom_addresses_fld_fixes.H index 82a589f8..23b63fbf 100644 --- a/src/import/chips/p9/common/include/p9_perv_scom_addresses_fld_fixes.H +++ b/src/import/chips/p9/common/include/p9_perv_scom_addresses_fld_fixes.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER sbe Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2016 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -61,7 +61,8 @@ static const uint64_t SH_FLD_SCAN_REGION_ALL_UNITS = 32014; static const uint64_t SH_FLD_SCAN_REGION_ALL_UNITS_LEN = 32015; static const uint64_t SH_FLD_SCAN_ALL_TYPES = 32016; static const uint64_t SH_FLD_SCAN_ALL_TYPES_LEN = 32017; - +static const uint64_t SH_FLD_TSFSI_NV_REFCLK_EN_DC = 22564; +static const uint64_t SH_FLD_TSFSI_NV_REFCLK_EN_DC_LEN = 22565; REG64_FLD( PERV_1_CLK_REGION_CLOCK_REGION_ALL_UNITS , 4 , SH_UNT_PERV_1 , SH_ACS_SCOM , SH_FLD_CLOCK_REGION_ALL_UNITS ); @@ -105,4 +106,10 @@ REG64_FLD( PERV_1_OPCG_REG0_OPCG_STARTS_BIST , 14 , SH_UN REG64_FLD( PERV_1_OPCG_REG0_OPCG_GO , 1 , SH_UNT_PERV_1 , SH_ACS_SCOM , SH_FLD_GO ); +REG64_FLD( PERV_ROOT_CTRL6_TSFSI_NV_REFCLK_EN_DC , 20 , SH_UNT_PERV , SH_ACS_SCOM , + SH_FLD_TSFSI_NV_REFCLK_EN_DC ); +REG64_FLD( PERV_ROOT_CTRL6_TSFSI_NV_REFCLK_EN_DC_LEN , 4 , SH_UNT_PERV , SH_ACS_SCOM , + SH_FLD_TSFSI_NV_REFCLK_EN_DC_LEN ); + + #endif |