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authorShakeeb <shakeebbk@in.ibm.com>2016-08-17 03:24:25 -0500
committerSachin Gupta <sgupta2m@in.ibm.com>2016-08-19 06:47:04 -0400
commitcebd3f7f42ef205a01e8a4ef5b1f6c5492ebfece (patch)
treecb54ce8d2af914652fd2a8c921b5b14218978603 /sbe
parentd63204d22f3cc3ef677f4396c8cbefd39c38b912 (diff)
downloadtalos-sbe-cebd3f7f42ef205a01e8a4ef5b1f6c5492ebfece.tar.gz
talos-sbe-cebd3f7f42ef205a01e8a4ef5b1f6c5492ebfece.zip
Put ring from image spec sync
Change-Id: I62402172e24d49d823a411f4ab7d47a2c82f0576 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28369 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'sbe')
-rw-r--r--sbe/sbefw/sbe_sp_intf.H8
-rw-r--r--sbe/sbefw/sbecmdringaccess.C5
-rwxr-xr-xsbe/test/test.xml3
-rw-r--r--sbe/test/testExecutorPutRing.py16
4 files changed, 14 insertions, 18 deletions
diff --git a/sbe/sbefw/sbe_sp_intf.H b/sbe/sbefw/sbe_sp_intf.H
index bb92e05d..9d812528 100644
--- a/sbe/sbefw/sbe_sp_intf.H
+++ b/sbe/sbefw/sbe_sp_intf.H
@@ -378,10 +378,10 @@ enum sbeRegAccesRegType
*/
typedef enum
{
- TARGET_PERV = 0x0000,
- TARGET_PROC_CHIP = 0x0001,
- TARGET_CORE = 0x0002,
- TARGET_EX = 0x0003,
+ TARGET_PROC_CHIP = 0x0000,
+ TARGET_EX = 0x0001,
+ TARGET_PERV = 0x0002,
+ TARGET_MCS = 0x0003,
} sbeRingTargetTypes_t;
/*
diff --git a/sbe/sbefw/sbecmdringaccess.C b/sbe/sbefw/sbecmdringaccess.C
index a3844034..f2bf213e 100644
--- a/sbe/sbefw/sbecmdringaccess.C
+++ b/sbe/sbefw/sbecmdringaccess.C
@@ -93,12 +93,9 @@ bool sbeGetFapiTargetHandle(uint16_t i_targetType,
fapi2::plat_target_handle_t &o_tgtHndl)
{
bool l_rc = true;
+ o_tgtHndl = NULL;
switch(i_targetType)
{
- case TARGET_CORE:
- o_tgtHndl = plat_getTargetHandleByChipletNumber
- <fapi2::TARGET_TYPE_CORE>(i_chipletId);
- break;
case TARGET_EX:
o_tgtHndl = plat_getTargetHandleByChipletNumber
<fapi2::TARGET_TYPE_EX>(i_chipletId);
diff --git a/sbe/test/test.xml b/sbe/test/test.xml
index 6234ba2f..00612be3 100755
--- a/sbe/test/test.xml
+++ b/sbe/test/test.xml
@@ -40,8 +40,7 @@
<include>../simics/targets/p9_nimbus/sbeTest/testRegAccess.xml</include>
<include>../simics/targets/p9_nimbus/sbeTest/testFifoReset.xml</include>
<include>../simics/targets/p9_nimbus/sbeTest/testAduMem.xml</include>
- <!-- TODO : Enable putring from image chip op test case-->
- <!--../simics/targets/p9_nimbus/sbeTest/testExecutorPutRing.xml-->
+ <include>../simics/targets/p9_nimbus/sbeTest/testExecutorPutRing.xml</include>
<include>../simics/targets/p9_nimbus/sbeTest/testGetRing.xml</include>
<testcase>
<simcmd>sbe-trace 0</simcmd>
diff --git a/sbe/test/testExecutorPutRing.py b/sbe/test/testExecutorPutRing.py
index 122619fc..59d4639e 100644
--- a/sbe/test/testExecutorPutRing.py
+++ b/sbe/test/testExecutorPutRing.py
@@ -35,7 +35,7 @@ This data are the values or strings that needs to be validated for the test.
'''
'''
#------------------------------------------------------------------------------------------------------------------------------
-# SBE side test data - Target - Core, Chiplet Id - 32, Ring ID - ec_func(177), mode - 0x0020(RING_MODE_HEADER_CHECK)
+# SBE side test data - Target - Pervasive(Core), Chiplet Id - 32, Ring ID - ec_func(224), mode - 0x0020(RING_MODE_HEADER_CHECK)
#------------------------------------------------------------------------------------------------------------------------------
'''
sbe_test_data1 = (
@@ -43,12 +43,12 @@ sbe_test_data1 = (
# OP Reg ValueToWrite size Test Expected Data Description
#-----------------------------------------------------------------------------------------------------
["write", reg.REG_MBOX0, "0000010000F0D301", 8, "None", "Writing to MBOX0 address"],
- ["write", reg.REG_MBOX1, "0002002000F90020", 8, "None", "Writing to MBOX1 address"],
+ ["write", reg.REG_MBOX1, "0002002000E00020", 8, "None", "Writing to MBOX1 address"],
["write", reg.PSU_SBE_DOORBELL_REG_WO_OR, "8000000000000000", 8, "None", "Update SBE Doorbell register to interrupt SBE"],
)
'''
#------------------------------------------------------------------------------------------------------------------------------
-# SBE side test data - Target - Pervasive, Chiplet Id - 1, Ring ID - perv_pll_bndy_bucket_1(10), mode - 0x0020(RING_MODE_HEADER_CHECK)
+# SBE side test data - Target - Pervasive(Perv), Chiplet Id - 1, Ring ID - perv_fure(00), mode - 0x0020(RING_MODE_HEADER_CHECK)
#------------------------------------------------------------------------------------------------------------------------------
'''
sbe_test_data2 = (
@@ -56,12 +56,12 @@ sbe_test_data2 = (
# OP Reg ValueToWrite size Test Expected Data Description
#--------------------------------------------------------------------------------------------------------------------------
["write", reg.REG_MBOX0, "0000010000F0D301", 8, "None", "Writing to MBOX0 address"],
- ["write", reg.REG_MBOX1, "00000001000A0020", 8, "None", "Writing to MBOX1 address"],
+ ["write", reg.REG_MBOX1, "0002000100000020", 8, "None", "Writing to MBOX1 address"],
["write", reg.PSU_SBE_DOORBELL_REG_WO_OR, "8000000000000000", 8, "None", "Update SBE Doorbell register to interrupt SBE"],
)
'''
#---------------------
-# SBE side test data - Target - PROC CHIP, Chiplet Id - 6, Ring ID - xb_pll_bndy_bucket_1(90), mode - 0x0020(RING_MODE_HEADER_CHECK)
+# SBE side test data - Target - PROC CHIP, Chiplet Id - x, Ring ID - ob0_fure(118), mode - 0x0020(RING_MODE_HEADER_CHECK)
#---------------------
'''
sbe_test_data3 = (
@@ -69,12 +69,12 @@ sbe_test_data3 = (
# OP Reg ValueToWrite size Test Expected Data Description
#--------------------------------------------------------------------------------------------------------------------------
["write", reg.REG_MBOX0, "0000010000F0D301", 8, "None", "Writing to MBOX0 address"],
- ["write", reg.REG_MBOX1, "0001000600590020", 8, "None", "Writing to MBOX1 address"],
+ ["write", reg.REG_MBOX1, "0000000600760020", 8, "None", "Writing to MBOX1 address"],
["write", reg.PSU_SBE_DOORBELL_REG_WO_OR, "8000000000000000", 8, "None", "Update SBE Doorbell register to interrupt SBE"],
)
'''
#------------------------------------------------------------------------------------------------------------------------------
-# SBE side test data - Target - EX, Chiplet Id - 32, Ring ID - ex_l3_refr_repr(223), mode - 0x0020(RING_MODE_HEADER_CHECK)
+# SBE side test data - Target - EX, Chiplet Id - 32, Ring ID - ex_l3_fure(176), mode - 0x0020(RING_MODE_HEADER_CHECK)
#------------------------------------------------------------------------------------------------------------------------------
'''
sbe_test_data4 = (
@@ -82,7 +82,7 @@ sbe_test_data4 = (
# OP Reg ValueToWrite size Test Expected Data Description
#-----------------------------------------------------------------------------------------------------
["write", reg.REG_MBOX0, "0000010000F0D301", 8, "None", "Writing to MBOX0 address"],
- ["write", reg.REG_MBOX1, "0003002000DF0020", 8, "None", "Writing to MBOX1 address"],
+ ["write", reg.REG_MBOX1, "0001002000B00020", 8, "None", "Writing to MBOX1 address"],
["write", reg.PSU_SBE_DOORBELL_REG_WO_OR, "8000000000000000", 8, "None", "Update SBE Doorbell register to interrupt SBE"],
)
'''
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