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| author | Glenn Miles <milesg@us.ibm.com> | 2015-03-10 17:42:41 -0500 |
|---|---|---|
| committer | Glenn R. Miles <milesg@us.ibm.com> | 2015-03-18 12:48:41 -0500 |
| commit | 940a702e3db3e03d782963fb46918dc8e22a17a6 (patch) | |
| tree | 4dba9b862aeadbc7e38c68d5e641163d1334e62a /pk/ppe42/ppe42_init.c | |
| parent | 67f172f563d6f229ba9d30eb97a4cc0d64a7af17 (diff) | |
| download | talos-sbe-940a702e3db3e03d782963fb46918dc8e22a17a6.tar.gz talos-sbe-940a702e3db3e03d782963fb46918dc8e22a17a6.zip | |
Support for using an external timebase register
Change-Id: I2c40fdf88f51315b19e8d639f874fb79717419ce
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/16369
Reviewed-by: Glenn R. Miles <milesg@us.ibm.com>
Tested-by: Glenn R. Miles <milesg@us.ibm.com>
Diffstat (limited to 'pk/ppe42/ppe42_init.c')
| -rw-r--r-- | pk/ppe42/ppe42_init.c | 19 |
1 files changed, 10 insertions, 9 deletions
diff --git a/pk/ppe42/ppe42_init.c b/pk/ppe42/ppe42_init.c index 2e4a2ad2..0beea37d 100644 --- a/pk/ppe42/ppe42_init.c +++ b/pk/ppe42/ppe42_init.c @@ -50,15 +50,16 @@ __ppe42_system_setup() */ #endif /*STATIC_IRQ_TABLE*/ - // Set the DEC to decrement on every cycle and enable the DEC interrupt. Clear the status - // of all timers for good measure. - - //andc_spr(SPRN_TCR, TCR_DS); - //or_spr(SPRN_TCR, TCR_DIE); - - //Use dec_timer signal for decrementer - or_spr(SPRN_TCR, TCR_DIE | TCR_DS); - or_spr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS); + //Clear all status bits in the TSR + mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS); + +#ifndef APPCFG_USE_DEC_FOR_TIMEBASE + //Enable the DEC interrupt and configure it to use the external dec_timer signal + mtspr(SPRN_TCR, TCR_DIE | TCR_DS); +#else + //Enable the DEC interrupt and configure it to use the internal clock signal + mtspr(SPRN_TCR, TCR_DIE); +#endif /* APPCFG_USE_DEC_FOR_TIMEBASE */ #if PK_TIMER_SUPPORT #if PK_TRACE_SUPPORT |
