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author | Sachin Gupta <sgupta2m@in.ibm.com> | 2016-02-11 06:58:10 -0600 |
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committer | Sachin Gupta <sgupta2m@in.ibm.com> | 2016-02-15 23:09:14 -0600 |
commit | e32d96cd8f1cf643b56cc3cd0f5de87feb97a803 (patch) | |
tree | 6f418663f6d106d4d888507fe9873a96a194f058 /import | |
parent | 684be5baf330a4de13e38dfadd86a8c0e6635b47 (diff) | |
download | talos-sbe-e32d96cd8f1cf643b56cc3cd0f5de87feb97a803.tar.gz talos-sbe-e32d96cd8f1cf643b56cc3cd0f5de87feb97a803.zip |
Fix for sbe compilation
Change-Id: I472d7d2941c6360e2337b6c1b0b791a0353fae88
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/24198
Tested-by: Jenkins Server
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/24337
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Diffstat (limited to 'import')
-rw-r--r-- | import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C | 6 | ||||
-rw-r--r-- | import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml | 4 |
2 files changed, 2 insertions, 8 deletions
diff --git a/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C b/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C index 1cb9376c..9e05292c 100644 --- a/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C +++ b/import/chips/p9/procedures/hwp/perv/p9_sbe_select_ex.C @@ -263,10 +263,8 @@ fapi2::ReturnCode p9_sbe_select_ex( l_ex_num, l_ex_num); FAPI_DBG("SINGLE mode: core config: %016llX", l_core_config); - - FAPI_DBG("SINGLE mode: core chiplet %d 0x%02X with is chiplet id 0x%02X; selected element %d Target Type %X", - l_core_num, l_core_num, l_core_num + 0x20, 0, - l_core_functional_vector.at(0).getType()); + FAPI_DBG("SINGLE mode: chiplet id 0x%02X; selected element %d Target Type %X", + l_core_num + 0x20, 0, l_core_functional_vector.at(0).getType()); // We found the core and cache so exit in SINGLE mode break; diff --git a/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml b/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml index 81de9637..1d7679ef 100644 --- a/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml +++ b/import/chips/p9/procedures/xml/attribute_info/p9_sbe_attributes.xml @@ -90,10 +90,6 @@ <value>0x1</value> </entry> <entry> - <name>ATTR_SYS_FORCE_ALL_CORES</name> - <value>0x1</value> - </entry> - <entry> <name>ATTR_RISK_LEVEL</name> <value>0x1</value> </entry> |