Changes in ecc data fixing so reading and writing works

Change-Id: I8ec5fc295d0e80af6d28f53ed469a3c98450f4df
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24554
Tested-by: Jenkins Server
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: PPE CI
Tested-by: Hostboot CI
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24557
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>

7 files changed, 45 insertions, 27 deletions

diff --git a/import/chips/p9/procedures/hwp/nest/p9_adu_access.H b/import/chips/p9/procedures/hwp/nest/p9_adu_access.H
index b7dfcde1..c9b68859 100644
--- a/import/chips/p9/procedures/hwp/nest/p9_adu_access.H
+++ b/import/chips/p9/procedures/hwp/nest/p9_adu_access.H
@@ -7,7 +7,7 @@
 /*                                                                        */
 /* EKB Project                                                            */
 /*                                                                        */
-/* COPYRIGHT 2015                                                         */
+/* COPYRIGHT 2015,2016                                                    */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -79,7 +79,8 @@ extern "C" {
 /// @param[in] i_target       => P9 chip target
 /// @param[in] i_address      => base real address for read/write operation (expected to be 8B aligned)
 /// @param[in] i_rnw          => if the operation is a read not write (1 for read, 0 for write)
-/// @param[in] i_flags        => other information that is needed - the flags are:
+/// @param[in] i_flags        => other information that is needed - see the p9_adu_constants adu_flags enums for bit definitions
+//                               Note: To construct the flag you can use p9_ADU_oper_flag class
 /// @param[in] i_lastGranule  => if this is the last 8B of data that we are collecting (true = last granule, false = not last granule)
 /// @param[in] i_firstGranule => if this is the first 8B of data that we are collecting (true = first granule, false = not first granule)
 /// @param[in, out] io_data   => The data is read/written
diff --git a/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C b/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C
index 94dcfcc0..62d6b661 100644
--- a/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C
+++ b/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.C
@@ -165,12 +165,36 @@ extern "C"
     //---------------------------------------------------------------------------------
     fapi2::ReturnCode p9_adu_coherent_utils_check_args(
         const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
-        const uint64_t i_address)
+        const uint64_t i_address,
+        const uint32_t i_flags)
     {
         FAPI_DBG("Start");
 
+        p9_ADU_oper_flag l_myAduFlag;
+        p9_ADU_oper_flag::Transaction_size_t l_transSize;
+        uint32_t l_actualTransSize;
+
+        l_transSize = l_myAduFlag.getTransactionSize();
+
+        if ( l_transSize == p9_ADU_oper_flag::TSIZE_1 )
+        {
+            l_actualTransSize = 1;
+        }
+        else if ( l_transSize == p9_ADU_oper_flag::TSIZE_2 )
+        {
+            l_actualTransSize = 2;
+        }
+        else if ( l_transSize == p9_ADU_oper_flag::TSIZE_4 )
+        {
+            l_actualTransSize = 4;
+        }
+        else
+        {
+            l_actualTransSize = 8;
+        }
+
         //Check the address alignment
-        FAPI_ASSERT(!(i_address & P9_FBC_UTILS_CACHELINE_MASK),
+        FAPI_ASSERT(!(i_address & (l_actualTransSize - 1)),
                     fapi2::P9_ADU_COHERENT_UTILS_INVALID_ARGS().set_TARGET(i_target).set_ADDRESS(
                         i_address),
                     "Address is not cacheline aligned");
@@ -665,7 +689,7 @@ extern "C"
 
         if (l_eccMode)
         {
-            o_read_data[eccIndex] = (force_ecc_reg_data >> ALTD_DATA_TX_ECC_END_BIT) & ALTD_DATA_ECC_MASK;
+            o_read_data[eccIndex] = (force_ecc_reg_data >> (63 - ALTD_DATA_TX_ECC_END_BIT)) & ALTD_DATA_ECC_MASK;
         }
 
         FAPI_TRY(fapi2::getScom(i_target, PU_ALTD_STATUS_REG, altd_status_reg_data),
@@ -680,6 +704,7 @@ extern "C"
             o_read_data[i] = (altd_data_reg_data >> (56 - (i * 8))) & 0xFFull;
         }
 
+        FAPI_DBG("o_read_data[8] = %8X", o_read_data[8]);
         //o_read_data[0] = altd_data_reg_data;
         FAPI_DBG("altd_data_reg_data = %lu\n", altd_data_reg_data);
 
diff --git a/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.H b/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.H
index 9c5eaf6d..56378e7b 100644
--- a/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.H
+++ b/import/chips/p9/procedures/hwp/nest/p9_adu_coherent_utils.H
@@ -76,7 +76,7 @@ extern"C"
                 CACHE_INHIBIT = 0,
                 DMA_PARTIAL   = 1,
                 PB_OPER       = 2,
-                PMISC_OPER    = 3,
+                PMISC_OPER    = 3
             };
 
             // Transaction size
@@ -85,7 +85,7 @@ extern"C"
                 TSIZE_1 = 1,
                 TSIZE_2 = 2,
                 TSIZE_4 = 4,
-                TSIZE_8 = 8,
+                TSIZE_8 = 8
             };
 
             // Constructor
@@ -550,7 +550,8 @@ extern"C"
 /// @return FAPI_RC_SUCCESS if arguments are valid
     fapi2::ReturnCode p9_adu_coherent_utils_check_args(
         const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
-        const uint64_t i_address);
+        const uint64_t i_address,
+        const uint32_t i_flags);
 
 /// @brief ensure that fabric is initialized and stop control is not set
 ///           (by checkstop/mode switch), which if set would prohibit fabric
diff --git a/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C b/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C
index 4bb7254d..23855fe4 100644
--- a/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C
+++ b/import/chips/p9/procedures/hwp/nest/p9_adu_setup.C
@@ -60,7 +60,7 @@ extern "C"
         bool adu_leave_dirty = i_flags & FLAG_LEAVE_DIRTY;
 
         //check arguments
-        FAPI_TRY(p9_adu_coherent_utils_check_args(i_target, i_address),
+        FAPI_TRY(p9_adu_coherent_utils_check_args(i_target, i_address, i_flags),
                  "Error from p9_adu_coherent_utils_check_args");
 
         //ensure fabric is running
diff --git a/import/chips/p9/procedures/hwp/nest/p9_adu_setup.H b/import/chips/p9/procedures/hwp/nest/p9_adu_setup.H
index 55dbd6dc..122df116 100644
--- a/import/chips/p9/procedures/hwp/nest/p9_adu_setup.H
+++ b/import/chips/p9/procedures/hwp/nest/p9_adu_setup.H
@@ -7,7 +7,7 @@
 /*                                                                        */
 /* EKB Project                                                            */
 /*                                                                        */
-/* COPYRIGHT 2015                                                         */
+/* COPYRIGHT 2015,2016                                                    */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -76,18 +76,8 @@ extern "C" {
 /// @param[in] i_target       => P9 chip target
 /// @param[in] i_address      => base real address for read/write operation (expected to be 8B aligned)
 /// @param[in] i_rnw          => if the operation is read not write (1 for read, 0 for write)
-/// @param[in] i_flags        => other information that is needed - the flags are:
-///                               -bit 0-cache inhibited - use cache-inhibited ttype?
-///                                     (true = ci, false = dma partial)
-///                               -bit 1-autoinc - utilize ADU HW auto-increment function
-///                               -bit 2-lock pick - pick ADU lock (if required)
-///                               -bit 3-leave dirty - in the case of a fail with lock held,
-///                                      do not reset ADU & do not release lock
-///                               -bit 4-fastmode - check status only at the end of read/write stream
-///                               -bit 5-itag - collect itag with each 8B read/write
-///                               -bit 6:13-size - transaction size
-///                               -bit 14:32-lock tries - number of ADU lock acquisitions to attempt
-///                                      before giving up or attempting lock pick
+/// @param[in] i_flags        => other information that is needed - see the p9_adu_constants adu_flags enums for bit definitions
+///                              Note: To construct the flag you can use p9_ADU_oper_flag class
 /// @param[out] o_numGranules  => number of 8B granules that can be read/written before setup needs to be called again
 //
 /// @return FAPI_RC_SUCCESS if the setup completes successfully,
diff --git a/import/chips/p9/procedures/hwp/nest/p9_pba_access.H b/import/chips/p9/procedures/hwp/nest/p9_pba_access.H
index a1a7d2dc..b78c24cd 100644
--- a/import/chips/p9/procedures/hwp/nest/p9_pba_access.H
+++ b/import/chips/p9/procedures/hwp/nest/p9_pba_access.H
@@ -7,7 +7,7 @@
 /*                                                                        */
 /* EKB Project                                                            */
 /*                                                                        */
-/* COPYRIGHT 2015                                                         */
+/* COPYRIGHT 2015,2016                                                    */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -77,7 +77,8 @@ extern "C" {
 /// @param[in]  i_target       => P9 chip target
 /// @param[in]  i_address      => base real address for read/write operation (expected to be 128B aligned)
 /// @param[in]  i_rnw          => if the operation is read not write (1 for read, 0 for write)
-/// @param[in]  i_flags        => other information that is needed - the flags are: bit 1 - fastmode
+/// @param[in]  i_flags        => other information that is needed - see the p9_pba_constants pba_flags enums for bit definitions
+///                               Note: to construct the flag you can use the p9_PBA_oper_flag class
 /// @param[in]  i_lastGranule  => is this the last granule that is to be read/written
 /// @param[in]  i_firstGranule => first granule that is to be read/written NOT USED FOR PBA
 /// @param[in, out] io_data    => The data that is read/written
diff --git a/import/chips/p9/procedures/hwp/nest/p9_pba_setup.H b/import/chips/p9/procedures/hwp/nest/p9_pba_setup.H
index 12498c65..41030f54 100644
--- a/import/chips/p9/procedures/hwp/nest/p9_pba_setup.H
+++ b/import/chips/p9/procedures/hwp/nest/p9_pba_setup.H
@@ -7,7 +7,7 @@
 /*                                                                        */
 /* EKB Project                                                            */
 /*                                                                        */
-/* COPYRIGHT 2015                                                         */
+/* COPYRIGHT 2015,2016                                                    */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -76,8 +76,8 @@ extern "C" {
 /// @param[in]  i_ex_target => P9 EX Target for use with lco_m operations
 /// @param[in]  i_address => base real address for read/write operation (expected to be 128B aligned)
 /// @param[in]  i_rnw     => if the operation is read not write (1 for read, 0 for write)
-/// @param[in]  i_flags   => other information that is needed - the flags are:
-///                          -bit 1 - fastmode,
+/// @param[in]  i_flags   => other information that is needed - see the p9_pba_constants pba_flags enums for bit definitions
+///                          Note: to construct the flag you can use the p9_PBA_oper_flag class
 /// @param[out] o_numGranules => number of 128B granules that can be read/written before setup needs to be called again
 //
 /// @return FAPI_RC_SUCCESS if the setup completes successfully,